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Frequent Questions
  • [FAQ] Build and Run Instructions for mathlib, dsplib and fftlib

    Betsy Varughese
    Betsy Varughese
    Part Number: TDA4VH-Q1 Other Parts Discussed in Thread: MATHLIB , FFTLIB Tool/software: Hi Team, How can I build and execute Mathlib,FFTlib and DSPlib kernels on baremetal?
    • Answered
    • over 1 year ago
    • Processors
    • Processors forum
  • [FAQ] AM625 / AM623 / AM620-Q1 / AM62Ax / AM62Px / AM62D-Q1 Design Recommendations / Custom board hardware design - Queries related to Real-Time clock (RTC)

    Kallikuppa Sreenivasa
    Kallikuppa Sreenivasa
    Part Number: AM625 Other Parts Discussed in Thread: BQ32000 , AM62A7 , AM62A3 , SYSCONFIG , , AM62P , AM62L , , AM62D-Q1 Tool/software: Hi TI experts, I see that there is a RTC module instance. Do you have any guidance on the usage of the RTC
    • Answered
    • over 1 year ago
    • Processors
    • Processors forum
  • [FAQ] What is the maximum trace length ground-level translators can drive?

    Joshua Salinas
    Joshua Salinas
    FAQ: Logic and Voltage Translation > Ground-Level Translators >> Current FAQ The maximum trace length that ground-level translators (as well as logic devices) can drive is 60 mm. This is a safe trace length for most devices to drive across the majority…
    • over 1 year ago
    • Logic
    • Logic forum
  • [FAQ] Is DC ground shifting possible when both supplies are connected together?

    Joshua Salinas
    Joshua Salinas
    FAQ: Logic and Voltage Translation > Ground-Level Translators >> Current FAQ Ground shifting requires the voltage supplies to be separated and to remain within the recommended operating conditions. In the image below, GNDB shifts by -5V due to parasitic…
    • over 1 year ago
    • Logic
    • Logic forum
  • [FAQ] Can a negative PWM signal be generated from a positive PWM signal?

    Joshua Salinas
    Joshua Salinas
    Other Parts Discussed in Thread: TXG8041 FAQ: Logic and Voltage Translation > Ground-Level Translators >> Current FAQ A negative PWM signal can be generated using a ground-level translator if the system includes a negative supply rail. To prevent…
    • over 1 year ago
    • Logic
    • Logic forum
  • [FAQ] Ground-Level Translators

    Joshua Salinas
    Joshua Salinas
    FAQ: Logic and Voltage Translation > > Current FAQ [FAQ] What are the differences between Ground-Level Translators and Digital Isolators? [FAQ] Can I generate a negative PWM signal from a positive PWM signal? [FAQ] Is DC ground shifting possible…
    • over 1 year ago
    • Logic
    • Logic forum
  • [FAQ] What are the differences between Ground-Level Translators and Digital Isolators?

    Joshua Salinas
    Joshua Salinas
    FAQ: Logic and Voltage Translation > Ground-Level Translators >> Current FAQ Ground-level translators and digital isolators serve different purposes depending on system requirements like isolation, size, speed and leakage performance. The table below…
    • over 1 year ago
    • Logic
    • Logic forum
  • [FAQ] J721S2XSOMXEVM: Enable Other Uarts for boot logs in SPL ?

    Gokul Praveen
    Gokul Praveen
    Part Number: J721S2XSOMXEVM Tool/software: How to enable other uart for getting the boot logs?
    • Answered
    • over 1 year ago
    • Processors
    • Processors forum
  • [FAQ] TDA4AEN-Q1: Build Yocto on portable disk and share between different PC

    Adam Hua
    Adam Hua
    Part Number: TDA4AEN-Q1 Tool/software: Yocto build requires good internet connection, large storage space, large ddr memory on host pc and strong CPU. For small groups without a strong server, building yocto on a portable device like a removable disk…
    • Answered
    • over 1 year ago
    • Processors
    • Processors forum
  • [FAQ] DRA821: SPL BOOT without A72 SPL on J7200 on 10.1 SDK

    Gokul Praveen
    Gokul Praveen
    Part Number: DRA821 Tool/software: How to enable Semi-Falcon Boot Mode on 10.01 SDK? Boot Flow: R5 SPL -> ATF -> OPTEE -> U-BOOT -> Kernel Regards Gokul
    • Answered
    • over 1 year ago
    • Processors
    • Processors forum
<>

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