BUF802: Missing pins in SPICE model?

Hi Miles, 

I did not put an AUX_BIAS pin simply to save room, since it would just be shorted to Vs-. This was also my reasoning for combined power supply pins.

The model assumes a default R_Bias = 17.8 kΩ, but I did not model different R_Bias settings in this model. Would you find an R_Bias pin to be helpful for your analysis? If so I can try to work on it.

The TEMPC pin was my naïve attempt to allow an ambient temperature input into the model as a voltage (°C=V). Recently I learned how to make a temperature dependent voltage source inside of the model that allows me to change different model parameters versus temperature without an external pin. I will therefore remove the TEMPC pin during my next update.

Best regards,

Sean

Hi,

I understand the combined power supply pins, but why would AUX_BIAS just be shorted to Vs-?  I understand that in order to use the In_Aux terminal that Aux_Bias has to be connected to Vs-, but the pin configuration table says if you just want to run in Buffer mode then leave it floating.

To explain: I have a fairly significant offset on the output when I run the model (in that other SPICE engine) in Buffer mode only.  That is, a DC coupled fast pulse (~350ps rise time, followed "immediately" by a ~500ps fall time) to the IN pin. IN_Bias, In_Aux, CLH and CLL all floating.  I cannot quite figure out why... and now I am wondering if the model assumes that Aux_Bias is shorted to Vs- ... which maybe accounts for the offset?

Then again perhaps I have made an assumption and this cannot be used DC coupled?  I had assumed the model would have all the pins, much like schematic (Fig11-1) on page 28.

With respect to the R_Bias; that value is not built into the chip is it? I think I saw it external in the test schematic but I am currently locked out of PSPICE for TI - "too many machines..." error - and cannot recall exactly.  So, in answer to your question, yes, I would find R_Bias and Aux_Bias useful additions.

Thanks

Miles 

Hello Miles,

  Can you share the simulation file with us? I believe you might not be using the BUF802 in a composite loop with a precision amplifier to eliminate the offset. Otherwise, you will see a 600-800mV input offset voltage.

"In applications where DC precision is not needed or in cases where the input is AC coupled, the BUF802 can be used as a standalone input buffer in BF Mode. In case the precision required is higher than that offered by the BUF802, operate the BUF802 in CL Mode with a precision amplifier in a composite loop."

Thank you,

Sima 

Hi,
I am currently locked out of PSPICE (apparently too many installs, even though I uninstalled the only copy I actually had installed in order to reinstall it).
Therefore, my simulation is currently in another simulation tool.  That probably doesn't help you.

Anyway, I really just want to use the buffer.  I don't have a lot of room or power available (this will ultimately be 20 channels inside a physics detector) and I don't want to add all the extra bits for the precision offset control... thinking/hoping/assuming that the output came out around 0 volts with no signal input (either AC or DC coupled), rather than the approx -680mV that seems to be the case in my simulation  In other words, along the lines of the BUF602, but "faster".

I am also still not clear about the AUX_BIAS pin on the BUF802; is that (extra current source) actually in the model, shorted to V-, and therefore pulling extra current through the front end FET (assuming I understand the topology of the various diagrams)?

Okay, having taken a more thorough look through the datasheet I see that there is a Vos value of -600 mV typical.   I guess I glossed over that, though it wasn't so obvious that this input offset would be present at the output.
Anyway, back to my original comments that brought this whole thread up... I've recreated the schematic shown for the oscilloscope input stage shown in Figure 9.6 of the datasheet, and as there are no pins in the model for r_bias or aux_bias I can only conclude that the aux_bias is connected in the model (along with the default r_bias value) as the circuit simulates.
One other clarification please: there are numerous references to Vocm in the datasheet - such as figure 6-16.  I presume that the setting of Vocm to zero (in most cases) is established by the variable voltage behind the 1M Ohm resistor in Figure 7-1 (left), and the variable voltage applied to In_Aux in Figure 7-3

Thanks

Hello Miles,

   That is correct, the device will have around that input offset voltage unless used in a composite loop with a precision amplifier. 

   A TI version of PSpice can be found at this link: https://www.ti.com/tool/PSPICE-FOR-TI. It is a free install of PSpice which we support and includes our TI devices. 

   Correct, for Figure 9.6, r_Bias and aux_bias are connected to VS-, and Sean mentioned that he modeled the R_Bias to equal 17.8 kΩ. But, both are ultimately connected VEE (your setting for the negative power supply). 

   For Vocm, ideally this should be set to midsupply of the device. For balanced split supplies, this would be ground. While for single-supply, this would be VS+/2. This will give you maximal output voltage range and best distortion performance. However, you may set this pin to any value within the range specified in the datasheet which is 3V within and away of the rails of the device. The BUF802 also has clamping pins available, CLH and CLL.

Thank you,
Sima 

Hi Miles,

Miles Constable said:

I presume that the setting of Vocm to zero (in most cases) is established by the variable voltage behind the 1M Ohm resistor in Figure 7-1 (left), and the variable voltage applied to In_Aux in Figure 7-3

The BUF802 just needs a DC servo to work properly. Because of unavoidable drifts and manufacturing tolerances (which can be huge for JFETs) a fixed DC voltage wouldn't do.

Kai