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Original question:

INA240: Output non-linearity / inversion, at frequencies higher than BW

INA240: Clarification on PWM rejection

Mike Twieg1
Intellectual 390 points
Part Number: INA240


Hi all,

The INA241 datasheet says this about the PWM rejection feature:

I'm wondering what specifically is the dV/dt condition which triggers the "holding" on the output voltage.

I ask because in my application, the INA240 is not connected directly after the switching bridge switch node, but instead after a LC lowpass filter. I was assuming that the PWM rejection feature would not matter since the INA240 would see relatively smooth Vcm changes.

However I saw this thread from another user, who has also connected the INA240 after a choke, and was seeing some strange behavior:

https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1163949/ina240-output-non-linearity-inversion-at-frequencies-higher-than-bw

It doesn't seem like an explanation for the OP's observations was given, but Javier seemed to be hinting at the PWM rejection feature being part of it (the text they quoted is from the INA241, but I'm guessing it's the same for the INA240). I'm concerned that I may be triggering the PWM rejection mechanism in my application as well. My objective is to precisely sample the average output current within each PWM period, and based on the description in the datasheet I believe that the PWM rejection feature could cause significant errors in this measurement. Could anyone from TI explain more specifically what triggers the feature?

  • 0
    TI__Mastermind 34810 points

    Hi,

    It appears the engineer from the other thread is going after real time current. The issue is due to the signal being much faster than the INA240 BW can accommodate.

    Since you care more of the average current, LC filter will slow the ramp rate. Slower ramps help reduce output disturbances, and improves accuracy.

    If possible, it is good to wait a few uS after ramp transition before taking measurements even if there is LC filtering.

    Regards, Guang 

  • 0 in reply to Guang Zhou
    Intellectual 390 points

    Hi Guang, thaks for the quick reply.

    Not sure what is meant by "real time current".

    My application is something like a class D amplifier, where the PWM duty may be changing constantly, so in addition to the PWM ripple the "low frequency" output voltage and current will be changing continuously. So "wait a few us after ramp transition" doesn't really help, at least not without defining specifically what a "ramp transition" is.

    Hypothetically, if the filter between the PWM and the INA240 has sufficient attenuation, then the output ripple seen by the INA240 input will be "low enough" such that the PWM rejection is not triggered, correct?

    And this shouldn't depend on the actual PWM frequency; increasing the PWM frequency will also increase the frequency of the output ripple, but the amplitude will decrease as well, with dV/dt being roughly constant (assuming a simple a first-order filter).

    But I do not know how much attenuation is sufficient to prevent the PWM rejection from activating. I'm guessing it's triggered by dV/dt exceeding a certain threshold. Initially I assumed it would be very high, like >1V/us. But Aaron Freeman seemed to be seeing issues with lower slew rates.

    Is there any quantitative information you can share?

  • 0 in reply to Mike Twieg1
    TI__Mastermind 34810 points

    Hi,

    From what I can gather, you are essentially measuring the current from a constant voltage source (granted, there are ripples). PWM doesn’t really apply. Besides, there is no  qualitative information other than provided in the datasheet, my apologies.

    If you suspect the device is not working properly in your application, I’ll be more than happy to look over the schematic and test results.

    Regards, Guang

  • 0 in reply to Guang Zhou
    Intellectual 390 points

    Hi Guang,

    I had also assumed that the PWM rejection wouldn't apply in my case, but I also wouldn't assume it wouldn't apply in Aaron's case. But apparently that assumption would be wrong?

    Very odd to make a part which is overall extremely precise and well characterized, but also add a feature which may distort the output and not provide any quantitative characterization of that. I'm sure it's helpful when connected to the switching node, but in any other case it could harm accuracy, as far as I understand it. Extremely hard to estimate its impact without some coherent explanation of what triggers it.

    Could you at least clarify whether the description of the PWM rejection feature from the INA241 datasheet (quoted in my OP) also applies to the INA240?

    I don't yet have any proof that the feature is affecting my application. I'm not sure exactly what to look for. Could you propose a test which I could use to determine if the PWM rejection is being triggered or not. Something I could do with the dev board would be a good start.

  • 0 in reply to Mike Twieg1
    TI__Mastermind 34810 points

    Hi Mike,

    The description of the PWM rejection feature from the INA241 datasheet doesn’t  apply to the INA240. They are two different designs.

    As far as to prove whether the feature is affecting your application, one option is to measure the output of the INA240. At the same time measure the current with a trusted instrument/device and compare the two.

    Regards, Guang