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OPA855: High speed TIA for photon counting applications

Part Number: OPA855


Hello,

I am in the process of developing a photon counting front-end based on an MPPC. I am shooting for a 160 MHz BW and 20 kOhm overall TIA gain. The MPPC has a 320 pF capacitance.

The conceptual design is based on a first 1 kOhm TIA stage (with 1 pF Cf), followed by a (single/double) second gain stage with a total gain of 50 V/V maximum (depending on the MPPC gain, whose pixel size is still under discussion). There might be a need to have a pole-zero cancellation network after the first stage. 

Q1) any comments on the aforementioned requirements? Would OPA855 be a good choice for the first stage?

The OPA855 alone seems to be able to handle pretty well a 320 pF Cin, with a 60 MHz bandwidth (3p6 Cf). To reach the BW requirement and improve the noise performance, I would opt for an (ac-coupled) high-bandwidth bootstrap based on a low-noise JFET + RF NPN follower (I am a little worried about the e_n voltage noise of the latter). See picture.

Q2) In this case, I foresee some tuning (to stabilise the OPA and achieve a good step response), based on the effective input capacitance, which will depend on the actual gain and performance of the bootstrap follower, and the parasitic at the summing node.  Any suggestions on how to reach the desired goal?

  • Hello Daniele, 

      Thank you for the detailed information. Running through some calculations, I do agree that you would need two stage design to successfully reach 20kOhm overall gain at 160MHz bandwidth. However, you would need to reduce the first stage from proposed 1kOhm to around 100Ohms. This is due to the high input capacitance + high bandwidth requirement which would lose phase margin with higher gain settings. Below is the proposed design calculations for a phase margin of around 65 degrees which will give you a Butterworth response (very flat passband) at a Q factor of 0.707. 

      You can find this calculator at this link. With 100Ohm gain resistor, you can hit the required bandwidth and would need to include around 13pF of feedback capacitance for stability. And you are right that with the OPA855's 8GHz of GBW, you can hit around 63MHz of closed loop bandwidth. Therefore, yes, OPA855 is a good choice for your first stage.

       With these higher speed components, it is important to take great care with layout since the addition of board parasatics may cause oscillations. The most important consideration is to place the photodiode as close as possible to the input terminals of the amplifier. I would recommend looking at our FAQ page under the transimpedance amplifier circuit section where we have popular threads, content, and calculators. Especially this thread where Kai goes into detail about layout and stability analysis for TIAs using the OPA855.

       Do you require AC coupled design due to removing any ambient light or to remove any formed DC offsets (lower than causing any saturation to the amplifier)?

    Thank you,

    Sima

  • Dear Sima, 

    thank you for your answer and the very handy TIA calculator. 

    -- The idea with the second OPA855 circuit I posted -- the one with 160 MHz BW (1kOhm // 1pF feedback) and 320 pF Cin -- is that the bootstrap U7/U8 will try to keep constant the voltage drop across the photodetector, to effectively reduce the Cin seen by the OPA. Since in this case the "effective" Cin will depend on Cdiode and on the bootstrap itself, it might be hard for me to tune/evaluate overshoot and predict a clean step response. I was thinking about acting on the output impedance of the U8 follower to tune the response and adjust peaking. I don't know if I am missing something.

    Thank you,

    DP

    PS.

    -- I was also wondering if, for some specific applications which might require it, in order comply with the 7 V/V gain constrain of the decompensated opa855, a feasible strategy would be to add some physical shunt capacitance at the inverting node, to have sufficient (high-freq) noise gain. I am not foreseeing any practical case for this issue, but always good to ask.

    -- As far as your last question, the design is DC coupled at the moment, but any application notes on AC coupled solutions are always a useful reference.

  • Hello Daniele,

      Thank you for the detailed explanation! I see you mean bootstrapping to “isolate” the input capacitance of the MPP. I have seen and simulated these techniques, but let me look and discuss this further with my team in this particular case, and get back to you by Monday.

      For the decompensated question,TIAs do well with these types of amplifiers because they are naturally high gain. It will be equal to ratio between the input and feedback capacitance which is very high. It is good too notice this specification, I will link collateral showing this idea in the next reply.

      There are either bootstrapping techniques which fits with your first design or adding series capacitor which in some cases can affect your input signal. I can link some resources on this as well.

    Thank you,

    Sima 

  • Thank you. Looking forward to your feedback. 

    DP

  • Hello Daniele,

    Sima is currently on vacation, so she will pick back up on your thread when she is back in office. We appreciate your patience.

    Best Regards,

    Ignacio 

  • Hello Sima, 

    I was wondering whether you had a chance to pick back up on this thread.

    Thank you and best regards,

    DP

  • Hello Daniele, 

      I apologize for the very long delay in support. Before I left on vacation, I asked our TIA expert on your proposed method, and he confirmed that he has seen this work in the lab, but not as well as using a low input capacitance PD. 

      I researched other methods, and here are some useful resources:

    1. Attached file below, shows using a different amplifier as your isolation, either similar to a servo loop, or as a composite amplifier
    2. This link shows a comparison between a solution similar to your proposed solution and the below file's (1) solution

      I have been working on a similar solution to your proposed, but have yet still to be adjusted to meet the bandwidth requirement. 

      The circuit is showing it is stable, but still needs to be tuned to meet all requirements. I had a curiosity question on the original proposed circuit, what is the purpose of the BFR93AW?

      Overall if possible, I would suggest trying out different bootstrap methods. If you do not have a limited cost/time, I would suggest trying out the two amplifier stage composite loop, discrete transistor isolation method, and the regular TIA which is to have lower gain (100Ohms) to meet bandwidth requirement, and the rest of the gain on the second stage. These methods could have comparable noise, but the last one is simpler, and less likely to run into stability/oscillation issues. Especially with a >GHz amplifier, even small layout decisions could affect the overall stability of the circuit.  

    Hoyle-TIA Bootstrapping.pdf

    I appreciate your patience, Thank you!

    Sima