Hello,
I am in the process of developing a photon counting front-end based on an MPPC. I am shooting for a 160 MHz BW and 20 kOhm overall TIA gain. The MPPC has a 320 pF capacitance.
The conceptual design is based on a first 1 kOhm TIA stage (with 1 pF Cf), followed by a (single/double) second gain stage with a total gain of 50 V/V maximum (depending on the MPPC gain, whose pixel size is still under discussion). There might be a need to have a pole-zero cancellation network after the first stage.
Q1) any comments on the aforementioned requirements? Would OPA855 be a good choice for the first stage?
The OPA855 alone seems to be able to handle pretty well a 320 pF Cin, with a 60 MHz bandwidth (3p6 Cf). To reach the BW requirement and improve the noise performance, I would opt for an (ac-coupled) high-bandwidth bootstrap based on a low-noise JFET + RF NPN follower (I am a little worried about the e_n voltage noise of the latter). See picture.
Q2) In this case, I foresee some tuning (to stabilise the OPA and achieve a good step response), based on the effective input capacitance, which will depend on the actual gain and performance of the bootstrap follower, and the parasitic at the summing node. Any suggestions on how to reach the desired goal?



