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Original question:

OPA846: Question About Input Impedance and Phase Margin in TIA Circuit with OPA846

OPA892: How to analyze the phase margin of a TIA circuit including a buffer?

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Prodigy 40 points
Part Number: OPA892
Other Parts Discussed in Thread: THS3091

Tool/software:

Hello,

I am currently designing a TIA circuit with a bandwidth of approximately 10 MHz. The circuit is as follows:

Previously, in a circuit without a buffer, I was able to analyze the phase margin by examining the loop gain using an inductor and capacitor.

However, I encountered an issue where, to achieve the maximum voltage output of the OPA892, I need approximately 260 mA of current in a 50-ohm system (assuming a 13V output). To address this, I added a buffer circuit.

I have a few questions regarding this design:

1. Phase Margin Analysis with a Buffer
In this case, is it still valid to analyze the phase margin using the same method as before (loop gain analysis with an inductor and capacitor)?

2. Stability of the Buffer Circuit
I have configured the buffer circuit by directly feeding back to the inverting terminal. Are there any additional steps I should take to ensure the stability of the circuit?

3. Optimal Phase Margin
I understand that a phase margin between 45° and 60° is generally considered appropriate. However, I have come across some documents suggesting that a phase margin of around 70° might be beneficial for high-speed control applications. In my case, what would be the optimal phase margin?

I appreciate your insights. Below, I have attached details of my circuit for reference.

Have a great day!

  • +1
    TI__Intellectual 2065 points

    Hi,

    Thank you for providing all the detailed information and schematics.

    1. For analysing the phase margin, you should analyse both the circuits, TIA and buffer, separately by breaking 1 loop at a time, for stability. The second schematic that you have sent looks correct to me, you can do the same for the buffer circuit, to analyse buffer stability. 
      So it is still valid to analyze the phase margin using the same method as before (loop gain analysis with an inductor and capacitor).
      Similar E2E query: link

    2. If you plan to use this THS3091 in a gain of 1V/V, you will need to add a feedback resistor to the circuit and cannot directly short the output to the input. Since this is a current feedback amplifier, its stability is dependent on the feedback resistance. I recommend using Rf = 1.78kΩ as mentioned in the datasheet (page 20, section 8.4.1).




    3. Regarding the optimal phase margin, while 45-60 degrees is a good starting point, the specific requirements application may benefit from a higher phase margin. A 70-degree phase margin can offer increased stability and less overshoot. However, this often comes at the cost of slightly reduced bandwidth. The best approach is to simulate your circuit with different phase margins and evaluate the trade-off between stability, overshoot, and bandwidth to determine the optimal value for your specific needs.

    Best regards,

    Aditya Gosavi