TIPD164: Design guide on dense populated PCB

Part Number: TIPD164
Other Parts Discussed in Thread: INA826, ADS1248, , INA159

Tool/software:

Hi,

In the reference design of TIPD164, there is only one channel of ADC uses INA826 and INA159. Now I need to design 4 channels with exactly the same preamplifiers. No RTD is involved. I'm wondering if there is any more compact design of the preamplifiers for ADS1248 and what the best layout practice is on a dense populated board.

Your reply will be highly appreciated.

SP Lee

  • Hey SP,

    If you are doing a thermocouple measurement, I would recommend including an absolute temperature measurement on your board with an RTD or other temperature sensor. Please see the below article for some more information.

    https://e2e.ti.com/blogs_/archives/b/thesignal/posts/thermocouples-stuff-that-every-analog-designer-should-know

    However, if you are just doing general signal conditioning and you would like layout examples for instrumentation amplifiers, there is an example layout in the datasheet, and some layout considerations you can keep:

    1. Make sure the traces connected to RG are as short as possible, as this will be the node that is most sensitive to parasitic capacitance.
    2. Ensure that decoupling capacitors are placed as close to V+ and V- as possible, that the trace passes through the pad of the capacitor before connecting to V+/V- of the device, and that there are no vias between the decoupling capacitor and the V+/V- pins of the device.
      1. If this device is powered by a single supply, a decoupling cap on V- (GND) is not needed, and a single decoupling capacitor on V+ is sufficient. If the device is being used in single supply, please ensure proper common-mode voltages are input to the amplifier for linear operation
    3. Avoid routing Vout close to noisy traces, like switching power supplies or digital circuits. If they must be cross or be routed near each other, it is best to cross perpendicular to them, and it is best to have a ground trace/plane in between the noisy trace and sensitive analog trace to allow a path for the noise to couple to.
    4. Make sure your REF pin is driven by a low impedance source, impedance on REF will disrupt the CMRR of your output difference amplifier, and will affect performance of the device.

    If you would like us to review your layout, but do not want to post it publicly, you may also message someone directly and they can comment over chat!

    Best,
    Gerasimos

  • Hi Gerasimos,

    Thanks for your input. In the reference design of TIPD164, however, the RG is left unconnected. So we will follow that as well. Basically we will follow the reference design in TIPD164 and add some ESD protection components. Do you have any recommendations for ESD protection (regarding PCB layout)?

  • Hello SP,

    If the same exact circuit is used, I would recommend connecting the ESD protection between the resistors R16 and J9 as well as between R20 and J9 (although this is a GND node, so this may not be needed). This will ensure that at the presence of overvoltage/ESD, the ESD diode conducts first, before the internal protection diodes of the INA826. Below is the link to the ESD protection diodes from TI. Depending on your application need, you may filter the parametric table to find the correct device. As far as layout, I think the best practice is to place them as close as possible to the connector.

    https://www.ti.com/passive-discrete/diodes/esd-protection-diodes/products.html

    Best,
    Gerasimos