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Original question:

PGA113: PGA113 - Vcal, Vref, Avdd, Dvdd - What do they do?

PGA113: Capacitive coupling of Vref pin to GND

Umut AYDIN
Prodigy 10 points
Part Number: PGA113


Tool/software:

Hi,

In the documentation it is not clear that Vref pin can be connected to GND via a suitable size capacitor to achieve AC signal programmable gain only while keeping a unity DC gain. Assuming that CH1 is used as the active input with an AC signal biased at a DC level AVDD/2, and Vref pin is connected to GND via a capacitor, can we expect to see programmable amplified AC output at the Vout pin which is biased at AVDD/2 (ie programmable gain is applied only to AC part of the CH1 pin signal and unity gain is achieved on input DC signal)?

Thanks.

  • 0
    TI__Mastermind 22312 points

    Hi Umut, 

    Welcome to e2e :) 

    I am not sure if this is possible, it would help me understand more if there were numbers associated. 

    Could you please tell me more what the available power supplies are?
    What is the frequency and voltage range of the input signal? 
    Why does the design need a unity DC gain? What is the DC signal? 

    In general, what is the expected input and output of the device? 

    All the best,
    Carolina 

  • 0 in reply to Caro Walter
    Prodigy 10 points

    Hi Carolina,

    Available only power supply is 3.3v and AC signal bandwidth is between 1-100khz. Signal source is an AC coupled receiver and PGA113 is intended to be used to extend dinamic range of the received signal before ADC stage.

    Umut

  • 0 in reply to Umut AYDIN
    TI__Mastermind 22312 points

    Hi Umut,

    Something like this: AC coupled (HPF) non-inverting amplifier circuit (Rev. A)? 

    I can test this on the EVM. Could you please specify which capacitors I should use?

    All the best,
    Carolina

  • 0 in reply to Caro Walter
    Prodigy 10 points

    Hi,

    Using PGA113’s datasheet Fig 70 and Table 7, HPF corner frequency can be calculated as

    F(min) = 1 / ( 2 pi Ri Cvref )

    where Ri is mentioned as 3.25K on Table7. If F(min) is selected as 1khz, Cvref turns out to be 47nF. 


    So if you connect 47nF capacitor between Vref-pin and GND, PGA113 should be able to function as a programmable amplifier for 1khz and up frequencies AC inputs while maintaining unity gain for DC.

    Could you test this on EVM?

    Thanks.

  • 0 in reply to Umut AYDIN
    TI__Mastermind 22312 points

    Hi, 

    Yes, I can test this on the EVM.
    I have a full day of meetings tomorrow and am out of office on Friday. Is it okay if I test this by end of day on Monday? 

    All the best,
    Carolina 

  • 0 in reply to Caro Walter
    Prodigy 10 points

    Hi,

    I’m looking forward to hear results of your test.

    Best,

    Umut

  • 0 in reply to Umut AYDIN
    TI__Genius 15596 points

    Hi Umut,

    Let me go back through the goals of your measurement, and please feel free to correct any of my statements:

    We have an AC signal appearing at CH1 with a DC offset of VDD/2.

    We are connecting Vref to a capacitor to GND

    This implementation is not recommended as the Vref node has source impedance and bias current which would charge the capacitor to GND. 

    Vref is the midpoint on the output, so AC coupling this to GND will cause the measurement to float around

    If you want your data centered around AVDD/2, and only amplify the AC signal, you should connect Vref to AVDD/2. We will then use an AC coupling capacitor on the CH1 like this diagram shows:

    Does this accomplish what you are looking to achieve?

    Thanks,

    Jacob