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I downloaded a reference design for INA202 and changed few things to simulate my design. I connected the reset pin to 5V to enable latching of the comparator output. The comparator output is supposed to go high when Iload goes more than 4A and stay high. But in my case it is always it is always high (from the beginning of the simulation). Below is the circuit and the output of the simulation:
Attached is the reference design: sbom845_modified.TSC
Thank you for the reply. I am using version 9.3.100.244 SF-TI.
It works only if I select "Use initial conditions" or "Zero initial conditions".
Regarding the output, I checked the datasheet again and it states in page 2, note (1) : "If RESET is high at power-up, the comparator output comes up high and
requires a reset to assume a low state, if appropriate."
So according to the datasheet, if the RESET pin is connected to Vs when the circuit starts up, the CMP_out is high. Is that correct? Then doesn't it mean the simulation output and Figure 30 of the datasheet is not correct?
I also tried to test a physical circuit with RESET pin connected to Vs. I always get CMP_out high.
Hi,
I also verified that when the reset pin is high at power-up, the comparator output comes up high. When the reset was pulled low, output was reset to a low state. Figure 30 is correct because it does not show startup. Hope this answers your question.