OPA564 Flags

Hi Bill,

The OPA564 data sheet Electrical Characteristics lists the current limit and thermal shutdown flags sinking current in normal operation, and sourcing current during current limiting and thermal shutdown. Therefore, the pins are push-pull. 

I did some limited simulations with the model and I could only get the flag pins to sink current. I used the current limit function pin because it is easiest to activate than the thermal shutdown. I used a 100 kohm pull-up to V+ and drove the amplifier input so that the output would go into current limit. The flag voltage went from a low level near V- when the output wasn't in current limiting, to a high positive level when the output was in current limit. Therefore, the flag is modeled like an open drain/ collector instead of a push-pull output. I am certain the thermal flag output is devised this way as well.

Regards, Thomas

PA - Linear Applications Engineering

Hi Thomas,

It is not fully clear to me, in order to be able to use the digital flags, what do I need to place at these pins (in a real board)? Pull-up resistors? Or can I just use the digital flags outputs and connect them to an opamp/comparator input to read them?

Thank you!

Hi Angelica,

I am working on verifying the OPA564 IFLAG and TFLAG output configurations. I'll get back when I have some answers.

Regards, Thomas

PA - Linear Applications Engineering

Hello Angelica,

The OPA564 IFLAG and TFLAG functions provide CMOS-compatable otuput logic levels. That means they have current sourcing and sinking capabilites that are listed in the datasheet electrical specifications, but do note the drive current capability is very low. For the simplest connection there really isn't a requirement for a pull-up, or pull-down, resistor. The flags will go high and low and can drive a low-current input without the need for external components.

If there is a need to drive a visual indicator, or something that requires more current than they are capable driving directly, then the pins should be buffered. I show an example of this in the diagram shown below where IFLAG and TFLAG status are monitored with an LED. In this particular application the OPA564 is used with a dual (+/-) supply. VDIG is specified as (V-) + 3V to (V-) + 5 V. VDIG is used to power the positive supply pin for the logic inverters. Their negative supply pins connect to V-. If the OPA564 is used with a single positive supply than the flags and VDIG will be referenced to GND.

Regards, Thomas

PA - Linear Applications Engineering

Hi Thomas, thank you very much for your answer.

I have another question now. I attach a small document in which I ran spice simulations of the OPA564 in which the output current is limited to +/-400mA. I force the output current to be 1A, to test the current flag, as well as the current limitation of the chip. In one case I get a hiccup response from the IC, but in a similar configuration (with a few extra parts) I get a flat response of the output current of the chip. So I wonder what the real output I will get given an overcurrent output condition from the OPA564? Please review the attached Word file.

Thank you very much.

OPA564 Question - Output Current.docx

Hi Angelica,

I am having to study the OPA564 model to see if I can determine what to expect under your setup conditions. I'll get back to you when I have some answers.

Regards, Thomas

PA - Linear Applications Engineering

Thank you Thomas, let me pass you the Spice file:

OPA564_Test-2016-12-01T23-51.zip