question on noise model for TIA simulation

Hi Marc,

The output noise increase at higher frequencies related to the total capacitance on the inverting input (~200pF in your case) is "real" and can be observed at the output. It is related to the closed loop circuit Noise Gain (1+ Rf / Zg where Zg is the complex impedance from the inverting input to ground) which the input referred voltage noise (eN) sees. It is really the action of the closed loop amplifier and does not relate to the internal workings of the LMH6629 (or other devices for that matter).

Here is an application note which shows the equivalent input noise current in Equation 13 (where the last term is the average Noise Gain term you are talking about):

The output noise density at frequency F is this equivalent input-referred noise current (iEQ) times the feedback resistor.

If you are curious about the derivation of this term (like I was), this E2E post by Luke LaPointe may answer it in the Word document he has attached:

https://e2e.ti.com/cfs-file.ashx/__key/communityserver-discussions-components-files/10/5123.Capacitor-Noise-Posted-by-Luke-Lapointe.docx

Regards,

Hooman

Thank you very much for your answer.

This means that there is really a limit on the noise we can achieve with TIA built with op-amps. It seems that the LHM6629 is the very best available on the market...

I am targetting a 50 MHz BW TIA with a 200 pF APD and in my case, I can't expect less than 140uV RMS noise at the output of the TIA

I can gain a little if I put a small resistor in between the APD and the TIA (R3 on the schematics), which acts as a low pass filter and reduce the coupling between the APD capacitor and the voltage noise of the op-amp..

Here is the schematic I use in spice :

For some reasons, the Rl1 is mandatory for spice to define the DC operating point.

The noise picture obtained is the following (with 5 Ohm for R3): (red for Vout_TIA and Blue for the gain resistor contribution)

It is not far from what I obtained with my pencil, superimposed with the noise contributions from various values of leakage current in the APD :

The formula used is (not including the thermal noise from the feedback resistor) :

Many thanks for your reply

Marc

Hi Marc,

I've not tried it but would "bootstrapping" methods (to reduce the voltage change across the APD) help with the noise increase due to capacitance?

Here is an example, from E2E which I've not personally experimented with (Nov. 28, 2013 post from Jason shows the schematic using a BJT):

Regards,

Hooman

Thank you very much for your proposition.

I will have a careful look. and eventually make a try with simulation.

I will let you know if I find something interesting.

Marc

Dear TI'ers

Just to keep you inform of the development of my TIA based ion LMH6629.

The first try with a real PCB was not successful. I in fact I built an oscillator at 500 MHz.

Trying to understand, it appeared that my design is very-very sensitive to parasitic inductances.

The main contributors are the inductances in the feed-back loop (1.2 nH per via + 0.6 nH/mm of strip) and on the input lines.

Since my APD is supposed to be located far away from the board (~20 cm), I have to deal with 30 nH connection inductance.

The goal is to keep the bandwidth at 50 MHz.

So, thanks to spice, and the archives of this forum,I have succeeded to find a solution :

1) Put a resistor in serie with the op-amp output (100 Ohms in my case)

2) Put a RC (10W-200 pF) filter between in+ and in- of the op-amp as mentioned on page 21 of the datasheet (RTFM !)

3) Put damping resistor on the input line (10 Ohm)

I put the stability analysis without and with the "compensation.

On the first case, due to parasitic inductances, the open-loop gain almost never reach 0dB and the phase margin does not exist

In the second case, the 0 dB is reached at 200 MHz. There is som phase margin. The minimum is acheiced at 8MHz and is about25 deg. It is not that big, but seems enough to have a stable device.

Now, I am working on a TAI still based on LMH6629 (which has the best noise performances) with an input current buffer using a BC850 in common base configuration to try to isolate the APD from the TIA and improve the noise perforamce. I will keep you informed if you are interested in.

Regards

Marc

PS : I just put this message to be archived and eventually be useful to someone.

Hi Marc,
Thanks for posting your findings.

I would be interested to see how the Common Base stage you are planning to use affects noise, bandwidth, and may be even stability. You don't mention your APD equivalent capacitance. The Common Base stage should help the most when the APD capacitance is on the high side.

Do keep me (others) posted.

Regards,
Hooman

Hello,
The APD capacitance is about 160 pF at gain 50. Adding 40 pF and 30 nH for the connection strip line, you end up with 200 pF equivalent capacitance to deal with...
I am looking at a TIA with 50 MHz bandwidth with a dynamics of 20,000. So the target is to reach 50 uV noise at the TIA output and 1V max signal amplitude.
I will keep you inform of my results. The PCB is almost finished. Still few weeks to get the results.
Regards
Marc