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Original question:

TINA/Spice/THS4551: Importing model to LTspice

THS4551: Package question

Erik Anderson41
Intellectual 925 points
Part Number: THS4551

Hi,

This is mostly a packaging question.  Standard TI packages are shown here:

http://www.ti.com/lit/ml/ssqw049/ssqw049.pdf

You can see under VSSOP category it shows pitch range from 0.23mm to 0.5mm.  But the THS4551 calls out a VSSOP with pitch of 0.65mm.  In general, I'm getting really confused by IC companies using VSSOP vs. TSSOP vs. MSOP.  If you have any material that clarifies things, I would be grateful.

Erik

  • 0
    TI__Mastermind 28865 points

    Hello Erik,

       To start, this link provides definitions for packaging terminology: link1. The next link compares TI package names within each package family in terms of pin count, pitch, height, length, and width: link2. If you scroll towards the bottom of this link, you will find that the DGK, DGS, DDU, and DCU packages at TI fall into the VSSOP package family. THS4551DGKR does have a typical pitch of 0.65mm which matches the pitch for VSSOP-DGK in this link. This last link will give you more details when it comes to semiconductor packing methodology: link3. Hopefully, these links will clarify the differences between TI's package options. 

    Thank you,

    Sima

  • 0 in reply to Sima Jalaleddine
    Intellectual 925 points

    In the first link you supplied, I don't understand what the asterisks mean (*).  Can you explain?

    It would be nice if there was a historical background to understand TSOP vs VSOP.  One says "Thin Small ..." the other is "Very Small ..."   There must have been an original meaning for these terms that are now lost.

    Thanks for the links, even though they don't match terminology, its fairly useful information.

    Erik

  • 0 in reply to Erik Anderson41
    TI__Mastermind 28865 points

    Hello Erik,

      Unfortunately, I am actually not quite sure what the asterisks are referencing. I believe the term names are the original meanings, and their meanings are shared throughout the semiconductor packaging industry. I did find a technical note which has a small section that covers the timeline of these packages: link. 

    Thank you,

    Sima

  • 0 in reply to Sima Jalaleddine
    Intellectual 925 points

    Thanks for that last link, it was helpful.

    Erik