Variable Phase Delay in TAS3308

Shyam,

To evaluate the chip itself, I suggest you use the probe points on the board that directly connect to the pins of TAS, I've never used an _LC version of the EVM (matter of fact, I've never seen one), but I remember I have them on my EVM.  I believe there're some filtering at PWM out on board, (not on the chip), but I don't know the details, since I'm not a HW person.  Software wise, there's no filtering of any kind in ADCIn or PWMout components.

Susan

Shyam Nallabolu said:

Hi,

I recently started evaluating TAS3308 DAP. I am using a TAS3308EVM-LC. In a process flow chart, I added TAS3308ADCIn and TAS3308PWMOut blocks. I also have TAS3308AudioApp block. ADCIn is directly connected to PWMOut. When I generate code for this process flow and run the target, I can clearly hear through a headphone whatever signal I feed at Line In input connector.

There is a variable phase delay between input and output signals when measured using an oscilloscope. Input signal is measured between Pin 2 on connector J4 and GND. Output signal is measured between Tip (Left channel) on headphone socket J10 and GND.

With 50Hz sinewave as input, phase difference between Input and Output = 9ms.

At 100Hz, it is 3.5ms.

At 500Hz, it is 3.0 ms.

At 1kHz, it is .25 ms.

At 2kHz, it is .02 ms and

At 5kHz, it is .06 ms.

This variable phase delay is not noticeable when output is played through earphones, but I believe it will cause silent zones when played through a PA system and heard at longer distances from the source. Is this variable phase delay an artifact of the DAP? Is there a way to compensate for this variable delay?

That looks like a delay caused by the processing latency. The processing likely includes some IIR filtering, which adds to the delay. You can't eliminate the processing latency, but I'd look to see whether any of the actual processing is causing your odd frequency-dependent delay.

As for whether it's a problem: professional PA systems have used DSPs for years, and in fact it's quite common for delay to be introduced in different bandpasses (to compensate for the physical arrangement of drivers in an enclosure) and in different zones (for example, to make a set of delay speakers covering the rear of an auditorium line up with the main rig near the stage).

Hi Susan,

Thanks for your reply. Per your suggestion, I measured audio output directly on DAP Pins. I have several PurePath software related questions.

1)      When I compare Audio Input at connector J4 and Audio Output at headphone connector J10, I see a variable phase delay depending on the input frequency. However, I see in-phase (zero phase delay) output when I measure the signal on Lineout Pins 76 and 77 on the DAP. I have ADCIn, Volume Control and PWMOut components in the process flow. Is the Analog Input routed to Lineout Pins 76 and 77 by default?

2)      Is there a way to specify which of the 10 Inputs needs to be routed to Lineout?

3)      Are there any disadvantages (apart from variable phase delay) in using 'PWM followed by low pass filter' compared to Lineout?

4)      Is there an Output component in PurePath that sends audio output to Lineout pins 76 and 77 on 3308 DAP?

5)      Is there a Variable Gain component in PurePath to which I can feed the output of a RMS Detector block in a feedback loop? Is looping allowed in PurePath?

6)      In DRC block, all thresholds are specified in dB. The reference level to calculate dB value is the ‘maximum signal level’ according to Help Documentation on DRC component. Over what time duration (like settling time) does the algorithm ‘watch’ to determine this reference maximum signal? 

Regards,

Shyam.

Shyam,

Let me try to answer one by one.

1) Analog input is routed to LineOut directly, bypassing DAP, so what you see is actually the input signal without any processing

2) Yes.  You can select which one to use by sending an I2C command.

3) see 1)

4) see 1)

5) No.  PPS doesn't allow looping.

6) Maximum signal level refers to 0dBFS, 2Vrms in analog world and 65536 in digital domain.

Hope this helps.

Susan

Hi Andy,

Thanks for your response.

By using just ADCIn and PWMOut PurePath components, there is no other processing going on in the DAP. See reply from TI Engineer above.

When delay is introduced in pro PA systems, it is a controlled delay, based on room acoustics. The variable phase delay that I am observing in TAS3308EVM is NOT controlled.

Regards,

Shyam.

Susan,

Thanks for your response.

Before I get into variable gain, feedback loops and DRC, I need to solve problem in question 1 above : Variable Phase Delay between input and output on TAS3308EVM-LC. I was planning to use Lineout signal because its phase is not affected by DAP (unlike PWM output), but apparently, Lineout is routed directly from Analog input by bypassing any/all processing in the DAP chip.

Can you connect me with the HW Engr at TI who designed the board layout for TAS3308EVM? I need to understand whether the variable phase delay is a bug within TAS3308 DAP chip (in which case I cannot continue using the TI chip), or in the low pass filter that generates analog output from PWM.

Can you test the full version TAS3308EVM and see if the variable phase delay exists on it as well?

Thanks,

Shyam.