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TLV320AIC3100: CLOCK Frequency issue

Part Number: TLV320AIC3100
Other Parts Discussed in Thread: TLV320AIC3104

HI Team 

We are using tlv320aic3100 Internal codec.

facing issue related to MCLK.

Changes:

sound-tlv320aic31xx {
compatible = "simple-audio-card";
simple-audio-card,name = "tlv320aic31xx-Codec";
simple-audio-card,format = "i2s";
simple-audio-card,frame-master = <&cpudai2>;
simple-audio-card,bitclock-master = <&cpudai2>;

simple-audio-card,widgets =
"Speaker", "Speaker Jack";
simple-audio-card,routing =
"Speaker Jack", "SPK";

cpudai2: simple-audio-card,cpu {
sound-dai = <&sai1>;
};

simple-audio-card,codec {
sound-dai = <&tlv320aic31xx>;
clocks = <&clk IMX8MM_CLK_SAI1_ROOT>;
};
};

tlv320aic31xx: codec@18 {
compatible = "ti,tlv320aic3100";
reg = <0x18>;
pinctrl-0 = <&pinctrl_audio_reset_31xx>;
reset-gpios = <&gpio4 1 GPIO_ACTIVE_LOW>;
#sound-dai-cells = <0>;
ai31xx-micbias-vg = <MICBIAS_2_0V>;
HPVDD-supply = <&reg_3p3v>;
SPRVDD-supply = <&reg_3p3v>;
SPLVDD-supply = <&reg_3p3v>;
AVDD-supply = <&reg_3p3v>;
IOVDD-supply = <&reg_3p3v>;
DVDD-supply = <&reg_1p8v>;
};

&sai1 {
pinctrl-names = "default", "dsd";
pinctrl-0 = <&pinctrl_sai1>;
pinctrl-1 = <&pinctrl_sai1_dsd>;
assigned-clocks = <&clk IMX8MM_CLK_SAI1>;
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
assigned-clock-rates = <12500000>;
status = "okay";
};

pinctrl_sai1: sai1grp {
fsl,pins = <
MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK 0xd6 /*MCLK*/
MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC 0xd6 /*WCLK*/
MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK 0xd6 /*BCLK*/
MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0 0xd6 /*DIN*/
MX8MM_IOMUXC_SAI1_RXD0_SAI1_RX_DATA0 0xd6 /*DOUT*/
>;
};

LOGS:

Line 406: 04-18 19:45:59.438 0 0 E tlv320aic31xx-codec 1-0018: aic31xx_set_dai_sysclk: Unsupported frequency 24576000
Line 407: 04-18 19:45:59.447 0 0 E tlv320aic31xx-codec 1-0018: ASoC: error at snd_soc_dai_set_sysclk on tlv320aic31xx-hifi: -22
Line 407: 04-18 19:45:59.447 0 0 E tlv320aic31xx-codec 1-0018: ASoC: error at snd_soc_dai_set_sysclk on tlv320aic31xx-hifi: -22
Line 408: 04-18 19:45:59.456 0 0 E tlv320aic31xx-codec 1-0018: simple-card: set_sysclk error
Line 409: 04-18 19:45:59.462 0 0 E 30010000.sai-tlv320aic31xx-hifi: ASoC: error at snd_soc_link_init on 30010000.sai-tlv320aic31xx-hifi: -22
Line 409: 04-18 19:45:59.462 0 0 E 30010000.sai-tlv320aic31xx-hifi: ASoC: error at snd_soc_link_init on 30010000.sai-tlv320aic31xx-hifi: -22
Line 410: 04-18 19:45:59.473 0 0 W asoc-simple-card: probe of sound-tlv320aic31xx failed with error -22

Thanks

Divyesh.

  • Adding more inputs,

    LOGS:

    04-18 17:59:50.990 0 0 E fsl-sai 30010000.sai: failed to derive required Tx rate: 1536000
    04-18 17:59:50.997 0 0 E fsl-sai 30010000.sai: ASoC: error at snd_soc_dai_hw_params on 30010000.sai: -22
    04-18 17:59:51.016 0 0 E fsl-sai 30010000.sai: failed to derive required Tx rate: 1536000
    04-18 17:59:51.023 0 0 E fsl-sai 30010000.sai: ASoC: error at snd_soc_dai_hw_params on 30010000.sai: -22
    04-18 17:59:51.024 2481 2783 W VLC : [edb543b0/adf] libvlc audio output: timing screwed, reset positions
    04-18 17:59:51.038 0 0 W healthd : battery l=85 v=3 t=35.0 h=2 st=2 c=400000 fc=4000000 cc=32 chg=a
    04-18 17:59:51.042 0 0 E fsl-sai 30010000.sai: failed to derive required Tx rate: 1536000
    04-18 17:59:51.053 0 0 E fsl-sai 30010000.sai: ASoC: error at snd_soc_dai_hw_params on 30010000.sai: -22
    04-18 17:59:51.071 0 0 E fsl-sai 30010000.sai: failed to derive required Tx rate: 1536000
    04-18 17:59:51.074 2481 2783 W VLC : [edb543b0/adf] libvlc audio output: playback way too early (-1514574): playing silence
    04-18 17:59:51.074 2481 2783 D VLC : [edb543b0/adf] libvlc audio output: inserting 72699 zeroes
    04-18 17:59:51.078 0 0 E fsl-sai 30010000.sai: ASoC: error at snd_soc_dai_hw_params on 30010000.sai: -22
    04-18 17:59:51.097 0 0 E fsl-sai 30010000.sai: failed to derive required Tx rate: 1536000
    04-18 17:59:51.104 0 0 E fsl-sai 30010000.sai: ASoC: error at snd_soc_dai_hw_params on 30010000.sai: -22
    04-18 17:59:51.123 0 0 E fsl-sai 30010000.sai: failed to derive required Tx rate: 1536000
    04-18 17:59:51.130 0 0 E fsl-sai 30010000.sai: ASoC: error at snd_soc_dai_hw_params on 30010000.sai: -22
    04-18 17:59:51.146 0 0 E tlv320aic31xx-codec 1-0018: ASoC: error at soc_component_write_no_lock on tlv320aic31xx-codec.1-0018: -11
    04-18 17:59:51.173 352 453 E display : updateScreen invalid drmfd
    04-18 17:59:51.190 0 0 I chatty : uid=0(root) logd identical 4 lines
    04-18 17:59:51.200 0 0 E tlv320aic31xx-codec 1-0018: ASoC: error at soc_component_write_no_lock on tlv320aic31xx-codec.1-0018: -11
    04-18 17:59:51.211 0 0 E fsl-sai 30010000.sai: failed to derive required Tx rate: 1536000
    04-18 17:59:51.218 0 0 E fsl-sai 30010000.sai: ASoC: error at snd_soc_dai_hw_params on 30010000.sai: -22

    Whenever Im trying to play audio , we are not getting any clocks on I2S signal.

    thanks

  • adding more inputs:

    simple-audio-card,codec {
    sound-dai = <&tlv320aic31xx>;
    /*clocks = <&clk IMX8MM_CLK_SAI1_ROOT>;*/
    system-clock-frequency = <49152000 >;
    };

    &sai1 {
    pinctrl-names = "default", "dsd";
    pinctrl-0 = <&pinctrl_sai1>;
    pinctrl-1 = <&pinctrl_sai1_dsd>;
    assigned-clocks = <&clk IMX8MM_CLK_SAI1>;
    assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
    assigned-clock-rates = <49152000 >;
    status = "okay";
    };

    04-18 18:28:02.538     0     0 E tlv320aic31xx-codec 1-0018: aic31xx_set_dai_sysclk: Unsupported frequency 49152000                                                                             

    04-18 18:28:02.546     0     0 E tlv320aic31xx-codec 1-0018: ASoC: error at snd_soc_dai_set_sysclk on tlv320aic31xx-hifi: -22                                                                   

    04-18 18:28:02.556     0     0 E tlv320aic31xx-codec 1-0018: simple-card: set_sysclk error                                                                                                     

    04-18 18:28:02.562     0     0 E 30010000.sai-tlv320aic31xx-hifi: ASoC: error at snd_soc_link_init on 30010000.sai-tlv320aic31xx-hifi: -22                                                     

    04-18 18:28:02.573     0     0 W asoc-simple-card: probe of sound-tlv320aic31xx failed with error -22      

    Thnks

  • Clock issues is solved.

    But please suggest proper solution for it.

    please check I2Cdump and share your inputs on it.

    We are using SPK out.

    For now when we are playing audio it is showing:

    but speaker is not throwing any noise/sound.

  • Hi,

    Please check:

    • Based on your PLL clock divider, your MCLK(PLL_CLKIN) needs to be 12MHz
    • Your DAC is disabled register 63 page 0 (0x3F) is 0x14, both left and right DAC are disabled, these need to be enabled
    • DAC volume is also muted register 0x40 is 0x0C, these need to be not muted
    • Need to set your DAC volume in register 0x41 and 0x42
    • You also need to check the SPK registers in page 1 as this i2cdump only show page 0 registers.

    Regards.

  • Im using :

    + simple-audio-card,codec {
    + sound-dai = <&tlv320aic31xx>;
    + /*clocks = <&tlv31xx_mclk>;
    + clocks = <&clk IMX8MM_CLK_SAI1_ROOT>;*/
    + system-clock-frequency = <12000000>;
    + };
    + };

    &sai1 {
    pinctrl-names = "default", "dsd";
    pinctrl-0 = <&pinctrl_sai1>;
    pinctrl-1 = <&pinctrl_sai1_dsd>;
    assigned-clocks = <&clk IMX8MM_CLK_SAI1>;
    assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
    assigned-clock-rates = <49152000>;

    we have assigned above freq . Should I change it?

  • Please find i2cdump with latest changes:

    Measured Waveforms:

    MCLK is 49Mhz
    BCLK 1.53MHz
    WCLK 48.91Khz

    I have one doubt:

    evk_8mm:/ # tinyplay /sdcard/LRMonoPhase4.wav                                                                                                                                                 

    Playing sample: 2 ch, 48000 hz, 16 bit 7442240 bytes  

    >>>>> Why it is showing 2 ch. as 3100 codec is Mono right???

    To play from spk, which controls need to be enabled.

    Thanks

    Divyesh.

  • hi,

    The MCLK measured is wrong, please correct that - it should be 12MHz. The DAC channels are now enabled from the register setting.

    Regards.

  • Hi @pdjuandi,

    I changed MCLK ( SAI1  assigned-clock-rates = <12000000>; ) to 12Mhz. but after this change I'm not getting any I2S clocks when Audio is playing. These lines are showing continuous 1.8V only. Even DIN pin low. 

    If I change MCLK to 49Mhz..then clocks are coming but no audio..

    Need your help to fix with 12Mhz clock.

    SAI1 we are using:

    Thanks

    Divyesh.

  • I don't know how your host clock configuration, but from your register the codec MCLK is 12MHz and it's slave mode so the host would need to provide the wclk and bclk.

  • Hi Divyesh

    The attachment is the clk dts setting for BBB, hope this can help you.

    If possible, kindly consult the platform vendor on the MCLK setting. 
    am335x-boneblack-hdmi-i2s.dtsi

  • Hi pdjuandi,

    Current changes:

    tlv31xx_mclk: oscillator {
    compatible = "fixed-clock";
    #clock-cells = <0>;
    clock-frequency = <12000000>;
    clock-output-names = "tlv31xx-mclk";
    };
    sound-tlv320aic31xx {
    compatible = "simple-audio-card";
    simple-audio-card,name = "tlv320aic31xx-Codec";
    simple-audio-card,format = "i2s";
    simple-audio-card,frame-master = <&cpudai2>;
    simple-audio-card,bitclock-master = <&cpudai2>;

    simple-audio-card,widgets =
    "Speaker", "Speaker Jack";
    simple-audio-card,routing =
    "Speaker Jack", "SPK";

    cpudai2: simple-audio-card,cpu {
    sound-dai = <&sai1>;
    };

    simple-audio-card,codec {
    sound-dai = <&tlv320aic31xx>;
    clocks = <&tlv31xx_mclk>;
    };
    };

    tlv320aic31xx: codec@18 {
    compatible = "ti,tlv320aic3100";
    reg = <0x18>;
    pinctrl-0 = <&pinctrl_audio_reset_31xx>;
    reset-gpios = <&gpio4 1 GPIO_ACTIVE_LOW>;
    #sound-dai-cells = <0>;
    ai31xx-micbias-vg = <MICBIAS_2_0V>;
    HPVDD-supply = <&reg_3p3v>;
    SPRVDD-supply = <&reg_3p3v>;
    SPLVDD-supply = <&reg_3p3v>;
    AVDD-supply = <&reg_3p3v>;
    IOVDD-supply = <&reg_3p3v>;
    DVDD-supply = <&reg_1p8v>;
    };

    When I try to play audio, that time I can see 1.8V on MCLK, BCLK,WCLK lines (NO CLOCKS).

    if I change mclk to 49Mhz that time i can see clocks on I2S lines.

    In adb shell:

    evk_8mm:/sdcard # tinyplay LRMonoPhase4.wav                                                                                                                                                   

    Unable to open PCM device 0 (cannot set hw params: Invalid argument)                                                                                                                            

    LOGS:

    [  939.481489] fsl-sai 30010000.sai: failed to derive required Tx rate: 1536000

    [  939.488611] fsl-sai 30010000.sai: ASoC: error at snd_soc_dai_hw_params on 30010000.sai: -22  

                                                                                                        

  • Hi @Shengho Ding 

    Thanks for the reply..

    please check below changes. Thanks

  • HI,

    You need to have the correct clocks to the codec and as suggested by Shenghao please consult with the host vendor.

    Regards.

  • Do you have any updated driver ?

    Please provide working kernel dtsi changes

  • Hi Team,

    Somewhere I can see few clock related changes in driver file.

    Could you please check clock related changes:

    After registering codec, Do we need to write few registers manually to enable DAC settings? Or it will be done by codec driver? 

    Like if you check previous comments,  pdjuandi suggested few points to enable DAC and asked to change few registers , will it not done by driver file?

    Thanks

    Divyesh

  • Your dts file will configure the soundcard accordingly including the clock and input/output module, you will need to consult the host vendor on how to interface with the soundcard driver.

  • Following api can help to set the sample rate and related clk.

  • Hi Shengjao and pdjaundi,

    Please review kernel changes and let me know if any additional changes required

    .

    Internal_Codec_Changes.txt
    Main Node: 
     
     sound-tlv320aic31xx {
                    compatible = "simple-audio-card";
                    simple-audio-card,name = "tlv320aic31xx-Codec";
                    simple-audio-card,format = "i2s";
                    simple-audio-card,frame-master = <&cpudai2>;
                    simple-audio-card,bitclock-master = <&cpudai2>;
    
                    simple-audio-card,widgets =
                            "Speaker", "SpeakerOUT";
                    simple-audio-card,routing =
                            "SpeakerOUT", "SPK";
    
                    cpudai2: simple-audio-card,cpu {
                            sound-dai = <&sai1>;
                    };
    
                    simple-audio-card,codec {
                            system-clock-frequency = <12000000>;
                            /*clocks = <&clk IMX8MM_CLK_SAI1_ROOT>;*/
                    };
            };
    
            reg_3p3v: regulator-3p3v {
                    compatible = "regulator-fixed";
                    regulator-name = "3P3V";
                    regulator-min-microvolt = <3300000>;
                    regulator-max-microvolt = <3300000>;
                    startup-delay-us = <300000>;
                    regulator-always-on;
            };
    
            reg_1p8v: regulator-1p8v {
                    compatible = "regulator-fixed";
                    regulator-name = "1P8V";
                    regulator-min-microvolt = <1800000>;
                    regulator-max-microvolt = <1800000>;
                    regulator-always-on;
            };
    		
    		
    		
    SAI NODE: 
    
    &sai1 {
            pinctrl-names = "default", "dsd";
            pinctrl-0 = <&pinctrl_sai1>;
            pinctrl-1 = <&pinctrl_sai1_dsd>;
            assigned-clocks = <&clk IMX8MM_CLK_SAI1>;
            assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
            assigned-clock-rates = <12000000>, <12500000>;
            status = "okay";
    };
    
            pinctrl_sai1: sai1grp {
                    fsl,pins = <
                           MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK        0xd6 /*MCLK*/
                           MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC     0xd6 /*WCLK*/
                           MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK      0xd6 /*BCLK*/
                           MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0    0xd6 /*DIN*/
                           MX8MM_IOMUXC_SAI1_RXD0_SAI1_RX_DATA0    0xd6 /*DOUT*/
                    >;
            };
    
            pinctrl_sai1_dsd: sai1grp_dsd {
                    fsl,pins = <
                           MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK        0xd6 /*MCLK*/
                           MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC     0xd6 /*WCLK*/
                           MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK      0xd6 /*BCLK*/
                           MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0    0xd6 /*DIN*/
                           MX8MM_IOMUXC_SAI1_RXD0_SAI1_RX_DATA0    0xd6 /*DOUT*/
                    >;
            };
    		
    
    I2C2 Node:
    
            tlv320aic31xx: codec@18 {
                    compatible = "ti,tlv320aic3100";
                    reg = <0x18>;
                    pinctrl-0 = <&pinctrl_audio_reset_31xx>;
                    reset-gpios = <&gpio4 1 GPIO_ACTIVE_LOW>;
                    #sound-dai-cells = <0>;
                    ai31xx-micbias-vg = <MICBIAS_2_0V>;
                    HPVDD-supply = <&reg_3p3v>;
                    SPRVDD-supply = <&reg_3p3v>;
                    SPLVDD-supply = <&reg_3p3v>;
                    AVDD-supply = <&reg_3p3v>;
                    IOVDD-supply = <&reg_3p3v>;
                    DVDD-supply = <&reg_1p8v>;
            };
    		
    		
           pinctrl_audio_reset_31xx: pinctrl_audio_reset_31xx {
                   fsl,pins = <
                           MX8MM_IOMUXC_SAI1_RXC_GPIO4_IO1         0x16
                   >;
           };
    	   
    	   

    Please check below response from NXP vendor,

    " From the datasheet, the maximum MLCK supported is 50MHz, why codes driver requests 12/12.5MHz?
    In the sai1 clock configurations in dts, why clocks and clock-names are removed? "

  • Our driver ref code is tested on 12/12.5MHz. You can switch the mclk the platform can support, but some setting need a little changed per the datasheet.

  • Thanks shen for you promt response.

    What are the side effects if I change mclk to 49Mhz? 

  • Could you please brief on  "some setting need a little changed per the datasheet"

    Like what i have to make change?

  • I believe Shenghao is referring to the clock tree settings, for example Figure 7-35. Clock Distribution Tree.

  • Hi Team

    please find latest logs and changes

    please review and let me know if i missed anything.

    dmesg_int_codec_23_05.loglogcat_int_codec_23_05.log

    25_05.diff
    diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
    index 592d373..210bb557 100755
    --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
    +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
    @@ -8,7 +8,7 @@
     #include <dt-bindings/usb/pd.h>
     #include "imx8mm.dtsi"
     #include "imx8mm-nfc.dtsi"
    -
    +#include <dt-bindings/sound/tlv320aic31xx-micbias.h>
     / {
     	firmware {
     		android {
    @@ -137,6 +137,7 @@
     	bt_sco_codec: bt_sco_codec {
     		#sound-dai-cells = <1>;
     		compatible = "linux,bt-sco";
    +		status = "disabled";
     	};
     
     	sound-bt-sco {
    @@ -232,6 +233,55 @@
     		cpu-dai = <&micfil>;
     		status = "disabled";
     	};
    +
    +       tlv31xx_mclk: oscillator {
    +               compatible = "fixed-clock";
    +               #clock-cells = <0>;
    +               clock-frequency = <12000000>;
    +               clock-output-names = "tlv31xx-mclk";
    +       };
    +       sound-tlv320aic31xx {
    +               compatible = "simple-audio-card";
    +               simple-audio-card,name = "tlv320aic31xx-Codec";
    +               simple-audio-card,format = "i2s";
    +               simple-audio-card,frame-master = <&cpudai2>;
    +               simple-audio-card,bitclock-master = <&cpudai2>;
    +
    +               simple-audio-card,widgets =
    +                       "Speaker", "Speaker Jack";
    +               simple-audio-card,routing =
    +                       "Speaker Jack", "SPK";
    +
    +               cpudai2: simple-audio-card,cpu {
    +                       sound-dai = <&sai1>;
    +               };
    +
    +               simple-audio-card,codec {
    +                       sound-dai = <&tlv320aic31xx>;
    +                       clocks = <&tlv31xx_mclk>;
    +                       /*clocks = <&clk IMX8MM_CLK_SAI1_ROOT>;
    +                       system-clock-frequency = <12000000>;*/
    +               };
    +       };
    +
    +        reg_3p3v: regulator-3p3v {
    +                compatible = "regulator-fixed";
    +                regulator-name = "3P3V";
    +                regulator-min-microvolt = <3300000>;
    +                regulator-max-microvolt = <3300000>;
    +               startup-delay-us = <300000>;
    +                regulator-always-on;
    +        };
    +
    +        reg_1p8v: regulator-1p8v {
    +                compatible = "regulator-fixed";
    +                regulator-name = "1P8V";
    +                regulator-min-microvolt = <1800000>;
    +                regulator-max-microvolt = <1800000>;
    +                regulator-always-on;
    +        };
    +
    +
     	gpio-reset {
     		compatible = "linux,gpios-reset";
     		MCUreset: MCU {
    @@ -604,6 +654,21 @@
     			self-powered;
     		};
     	};
    +
    +        tlv320aic31xx: codec@18 {
    +                compatible = "ti,tlv320aic3100";
    +                reg = <0x18>;
    +                pinctrl-0 = <&pinctrl_audio_reset_31xx>;
    +                reset-gpios = <&gpio4 1 GPIO_ACTIVE_LOW>;
    +                #sound-dai-cells = <0>;
    +                ai31xx-micbias-vg = <MICBIAS_2_0V>;
    +                HPVDD-supply = <&reg_3p3v>;
    +                SPRVDD-supply = <&reg_3p3v>;
    +                SPLVDD-supply = <&reg_3p3v>;
    +                AVDD-supply = <&reg_3p3v>;
    +                IOVDD-supply = <&reg_3p3v>;
    +                DVDD-supply = <&reg_1p8v>;
    +        };
     };
     
     &i2c3 {
    @@ -641,6 +706,7 @@
     		reg = <0x10>;
     		AVDD-supply = <&reg_audio_board>;
     		DVDD-supply = <&reg_audio_board>;
    +		status = "disabled";
     	};
     
     	ak4458_2: ak4458@12 {
    @@ -648,6 +714,7 @@
     		reg = <0x12>;
     		AVDD-supply = <&reg_audio_board>;
     		DVDD-supply = <&reg_audio_board>;
    +		status = "disabled";
     	};
     
     	ak5558: ak5558@13 {
    @@ -656,6 +723,7 @@
     		reset-gpios = <&pca6416 3 GPIO_ACTIVE_LOW>;
     		AVDD-supply = <&reg_audio_board>;
     		DVDD-supply = <&reg_audio_board>;
    +		status = "disabled";
     	};
     
     	ak4497: ak4497@11 {
    @@ -665,6 +733,7 @@
     		AVDD-supply = <&reg_audio_board>;
     		DVDD-supply = <&reg_audio_board>;
     		dsd-path = <1>;
    +		status = "disabled";
     	};
     
     	ov5640_mipi: ov5640_mipi@3c {
    @@ -777,7 +846,6 @@
     			csis-clk-settle = <2>;
     			csis-wclk;
     		};
    -
     		csi1_mipi_ep: endpoint@2 {
     			remote-endpoint = <&csi1_ep>;
     		};
    @@ -856,6 +924,17 @@
     };
     
     &sai1 {
    +        #sound-dai-cells = <0>;
    +        pinctrl-names = "default", "dsd";
    +        pinctrl-0 = <&pinctrl_sai1>;
    +	pinctrl-1 = <&pinctrl_sai1_dsd>;
    +        assigned-clocks = <&clk IMX8MM_CLK_SAI1>;
    +        assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
    +        assigned-clock-rates = <12000000>;
    +        status = "okay";
    +};
    +/*
    +&sai1 {
     	pinctrl-names = "default", "dsd";
     	pinctrl-0 = <&pinctrl_sai1>;
     	pinctrl-1 = <&pinctrl_sai1_dsd>;
    @@ -872,7 +951,7 @@
     	dmas = <&sdma2 0 25 0>, <&sdma2 1 25 0>;
     	status = "okay";
     };
    -
    +*/
     &sai3 {
     	pinctrl-names = "default";
     	pinctrl-0 = <&pinctrl_sai3>;
    @@ -1177,37 +1256,29 @@
     		>;
     	};
     
    +       pinctrl_audio_reset_31xx: pinctrl_audio_reset_31xx {
    +               fsl,pins = <
    +                       MX8MM_IOMUXC_SAI1_RXC_GPIO4_IO1         0x16
    +               >;
    +       };
    +
     	pinctrl_sai1: sai1grp {
     		fsl,pins = <
    -			MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK	0xd6
    -			MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC	0xd6
    -			MX8MM_IOMUXC_SAI1_RXD7_SAI1_TX_SYNC	0xd6
    -			MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD1_SAI1_TX_DATA1	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD2_SAI1_TX_DATA2	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD3_SAI1_TX_DATA3	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD4_SAI1_TX_DATA4	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD5_SAI1_TX_DATA5	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD6_SAI1_TX_DATA6	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD7_SAI1_TX_DATA7	0xd6
    +			MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK	0xd6 /*MCLK*/
    +			MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC	0xd6 /*WCLK*/
    +			MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK	0xd6 /*BCLK*/
    +			MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0	0xd6 /*DIN*/
    +			MX8MM_IOMUXC_SAI1_RXD0_SAI1_RX_DATA0    0xd6 /*DOUT*/
     		>;
     	};
     
     	pinctrl_sai1_dsd: sai1grp_dsd {
     		fsl,pins = <
    -			MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK	0xd6
    -			MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC	0xd6
    -			MX8MM_IOMUXC_SAI1_RXD7_SAI1_TX_DATA4	0xd6
    -			MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD1_SAI1_TX_DATA1	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD2_SAI1_TX_DATA2	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD3_SAI1_TX_DATA3	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD4_SAI1_TX_DATA4	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD5_SAI1_TX_DATA5	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD6_SAI1_TX_DATA6	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD7_SAI1_TX_DATA7	0xd6
    +			MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK	0xd6 /*MCLK*/
    +			MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC	0xd6 /*WCLK*/
    +			MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK	0xd6 /*BCLK*/
    +			MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0	0xd6 /*DIN*/
    +			MX8MM_IOMUXC_SAI1_RXD0_SAI1_RX_DATA0    0xd6 /*DOUT*/
     		>;
     	};
     
    diff --git a/arch/arm64/configs/imx_v8_android_defconfig b/arch/arm64/configs/imx_v8_android_defconfig
    index a4771d2..4f561fb 100644
    --- a/arch/arm64/configs/imx_v8_android_defconfig
    +++ b/arch/arm64/configs/imx_v8_android_defconfig
    @@ -574,6 +574,8 @@ CONFIG_THERMAL_WRITABLE_TRIPS=y
     CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
     CONFIG_CPU_THERMAL=y
     CONFIG_THERMAL_EMULATION=y
    +CONFIG_SND_SOC_TLV320AIC31XX=y
    +CONFIG_SND_SOC_TLV320AIC3X=y
     CONFIG_IMX_SC_THERMAL=y
     CONFIG_IMX8MM_THERMAL=y
     CONFIG_DEVICE_THERMAL=y
    

  • i2cdetect i2c-2, but i2cdump the 0x18 chip on i2c-1

    I wan confused.

  • please ignore i2cdetect

    Codec is connected on I2C bus 2 means i2c-1.

    thanks

    Divyesh

  • Which format should I use : dsp or i2s

    Example: simple-audio-card,format = "i2s";

  • It depends on your project, what kind of product  do you develop?

  • We are developing one custom board IMX8mm with 0.8W codec for notifiaction.

    It will be like one small tablet.

    Aim is to make this codec up. once it is up, will work on feature developement.

    Need your help on clock settings.

    check patch in above comment.

    one input from driver file:

  • It seemed that i2s is suitable for your.

    dsp mode is normally used for multiple-slot TDM, super-set of i2s. 

  • Hi Shen,

    Need your help to add these freq in below driver file : 

    49.152M, 24.576M, 12.228MHz etc.

    static const struct aic31xx_rate_divs aic31xx_divs[] = {
    /* mclk/p rate pll: j d dosr ndac mdac aors nadc madc */
    /* 8k rate */
    {12000000, 8000, 8, 1920, 128, 48, 2, 128, 48, 2},
    {12000000, 8000, 8, 1920, 128, 32, 3, 128, 32, 3},
    {12500000, 8000, 7, 8643, 128, 48, 2, 128, 48, 2},
    /* 11.025k rate */
    {12000000, 11025, 7, 5264, 128, 32, 2, 128, 32, 2},
    {12000000, 11025, 8, 4672, 128, 24, 3, 128, 24, 3},
    {12500000, 11025, 7, 2253, 128, 32, 2, 128, 32, 2},
    /* 16k rate */
    {12000000, 16000, 8, 1920, 128, 24, 2, 128, 24, 2},
    {12000000, 16000, 8, 1920, 128, 16, 3, 128, 16, 3},
    {12500000, 16000, 7, 8643, 128, 24, 2, 128, 24, 2},
    /* 22.05k rate */
    {12000000, 22050, 7, 5264, 128, 16, 2, 128, 16, 2},
    {12000000, 22050, 8, 4672, 128, 12, 3, 128, 12, 3},
    {12500000, 22050, 7, 2253, 128, 16, 2, 128, 16, 2},
    /* 32k rate */
    {12000000, 32000, 8, 1920, 128, 12, 2, 128, 12, 2},
    {12000000, 32000, 8, 1920, 128, 8, 3, 128, 8, 3},
    {12500000, 32000, 7, 8643, 128, 12, 2, 128, 12, 2},
    /* 44.1k rate */
    {12000000, 44100, 7, 5264, 128, 8, 2, 128, 8, 2},
    {12000000, 44100, 8, 4672, 128, 6, 3, 128, 6, 3},
    {12500000, 44100, 7, 2253, 128, 8, 2, 128, 8, 2},
    /* 48k rate */
    {12000000, 48000, 8, 1920, 128, 8, 2, 128, 8, 2},
    {12000000, 48000, 7, 6800, 96, 5, 4, 96, 5, 4},
    {12500000, 48000, 7, 8643, 128, 8, 2, 128, 8, 2},

    Please help to add mentioned freq in above array. Please calculation required for other parameter.

    because we are using mentioned freq  and imx cannot divide any value.

    if I configure it to 12000000, the soundcard cannot work.
    The mclk cannot be divided to any value, typical values are 49.152M, 24.576M, 12.228MHz etc.

    thanks

  • In aic31xx_set_dai_sysclk, tell me the value of clk_id, freq and aic31xx->p_div. Thanks

  • Hi Shen,

    freq = 12288000

    clk_id = 0

    p_div = maybe 1 I guess (not sure).

    Thanks

  • The value of aic31xx->p_div is very important for the table setting. 

    As you know the first column of aic31xx_divs is MCLK/aic31xx->p_div, help me to check this. Thanks.

  • where to check this value?

    please refer it  p_div =  1

  • Thanks Shen for your prompt response. 

  • Hi shen,

    Please find below update:

    Measured all the clocks.

    MCLK = 12.28 MHz
    BCLK = 1.536  MHz
    WCLK = 47.99 KHz

    DIN = We can see data on DIN pin when we are playing audio file.

    BUT SPEKER is not throwing any data . Not even noise. 

    Please help to update the clock freq table .

    Please check attached logcat logs and dmesg logs : 

    4212.logcat.txt

    .3426.dmesg.txt

    I2CDUMP:

    PAGE 0:

    PAGE 1:

    Tinymix controls :100

    all tinymix controls are off , Do you have any comment why DAC path is not enabled during boot time.

    Thanks

    Divyesh.

  • I want confirm from you whether the BCLK and WCLK measured is generated from host or from the codec?

  • Device is in master mode I guess.

    MCLK is generating from HOST and BCLK and WCLK from codec.

  • So, the codec is slave. But from the DTS, the codec seemed as master, because there's the mclk in the codec module.

     + simple-audio-card,codec {
    + sound-dai = <&tlv320aic31xx>;
    + clocks = <&tlv31xx_mclk>;
    + /*clocks = <&clk IMX8MM_CLK_SAI1_ROOT>;
    + system-clock-frequency = <12000000>;*/
    + };

    For example, we will put the mclk to the cpu

    sound {
    compatible = "simple-audio-card";
    simple-audio-card,name = "TI BeagleBone Black";

    simple-audio-card,dai-link@0 {
    format = "i2s";
    bitclock-master = <&sound0_1_master>;
    frame-master = <&sound0_1_master>;

    sound0_1_master: cpu {
    sound-dai = <&mcasp0>;
    clocks = <&clk_mcasp0>;
    };

    codec {
    sound-dai = <&pcmdevice>;
    };
    };

  • Device is in master mode I guess.

    MCLK is generating from HOST and BCLK and WCLK from codec.

    U want to share latest changes ?

    NOTE: When we are trying to play something, driver is calling unmute function properly

    tlv320aic31xx-codec 1-0018: ##Divyesh tlv  Enter : aic31xx_dac_mute >> Else function > unmute

    Otherwise it will stay in mute condition.

    tlv320aic31xx-codec 1-0018: ##Divyesh tlv  Enter : aic31xx_dac_mute >> if function > mute

  • Latest_changes_31_5_22_INT.txt
    diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
    index 592d373..f22f02b 100755
    --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
    +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
    @@ -8,6 +8,7 @@
     #include <dt-bindings/usb/pd.h>
     #include "imx8mm.dtsi"
     #include "imx8mm-nfc.dtsi"
    +#include <dt-bindings/sound/tlv320aic31xx-micbias.h>
     
     / {
     	firmware {
    @@ -137,6 +138,7 @@
     	bt_sco_codec: bt_sco_codec {
     		#sound-dai-cells = <1>;
     		compatible = "linux,bt-sco";
    +		status = "disabled";
     	};
     
     	sound-bt-sco {
    @@ -232,6 +234,52 @@
     		cpu-dai = <&micfil>;
     		status = "disabled";
     	};
    +       tlv31xx_mclk: oscillator {
    +               compatible = "fixed-clock";
    +               #clock-cells = <0>;
    +               clock-frequency = <12000000>;
    +               clock-output-names = "tlv31xx-mclk";
    +       };
    +       sound-tlv320aic31xx {
    +               compatible = "simple-audio-card";
    +               simple-audio-card,name = "tlv320aic31xx-Codec";
    +               simple-audio-card,format = "i2s";
    +               simple-audio-card,frame-master = <&cpudai2>;
    +               simple-audio-card,bitclock-master = <&cpudai2>;
    +
    +               simple-audio-card,widgets =
    +                       "Speaker", "Speaker Jack";
    +               simple-audio-card,routing =
    +                       "Speaker Jack", "SPK";
    +
    +               cpudai2: simple-audio-card,cpu {
    +                       sound-dai = <&sai1>;
    +               };
    +
    +               simple-audio-card,codec {
    +                       sound-dai = <&tlv320aic31xx>;
    +                       /*clocks = <&tlv31xx_mclk>;
    +                       clocks = <&clk IMX8MM_CLK_SAI1_ROOT>;*/
    +                       system-clock-frequency = <12288000>;
    +               };
    +       };
    +
    +        reg_3p3v: regulator-3p3v {
    +                compatible = "regulator-fixed";
    +                regulator-name = "3P3V";
    +                regulator-min-microvolt = <3300000>;
    +                regulator-max-microvolt = <3300000>;
    +               startup-delay-us = <300000>;
    +                regulator-always-on;
    +        };
    +
    +        reg_1p8v: regulator-1p8v {
    +                compatible = "regulator-fixed";
    +                regulator-name = "1P8V";
    +                regulator-min-microvolt = <1800000>;
    +                regulator-max-microvolt = <1800000>;
    +                regulator-always-on;
    +        };
     	gpio-reset {
     		compatible = "linux,gpios-reset";
     		MCUreset: MCU {
    @@ -604,6 +652,21 @@
     			self-powered;
     		};
     	};
    +
    +        tlv320aic31xx: codec@18 {
    +                compatible = "ti,tlv320aic3100";
    +                reg = <0x18>;
    +                pinctrl-0 = <&pinctrl_audio_reset_31xx>;
    +                reset-gpios = <&gpio4 1 GPIO_ACTIVE_LOW>;
    +                #sound-dai-cells = <0>;
    +                ai31xx-micbias-vg = <MICBIAS_2_0V>;
    +                HPVDD-supply = <&reg_3p3v>;
    +                SPRVDD-supply = <&reg_3p3v>;
    +                SPLVDD-supply = <&reg_3p3v>;
    +                AVDD-supply = <&reg_3p3v>;
    +                IOVDD-supply = <&reg_3p3v>;
    +                DVDD-supply = <&reg_1p8v>;
    +        };
     };
     
     &i2c3 {
    @@ -641,6 +704,7 @@
     		reg = <0x10>;
     		AVDD-supply = <&reg_audio_board>;
     		DVDD-supply = <&reg_audio_board>;
    +		status = "disabled";
     	};
     
     	ak4458_2: ak4458@12 {
    @@ -648,6 +712,7 @@
     		reg = <0x12>;
     		AVDD-supply = <&reg_audio_board>;
     		DVDD-supply = <&reg_audio_board>;
    +		status = "disabled";
     	};
     
     	ak5558: ak5558@13 {
    @@ -656,6 +721,7 @@
     		reset-gpios = <&pca6416 3 GPIO_ACTIVE_LOW>;
     		AVDD-supply = <&reg_audio_board>;
     		DVDD-supply = <&reg_audio_board>;
    +		status = "disabled";
     	};
     
     	ak4497: ak4497@11 {
    @@ -665,6 +731,7 @@
     		AVDD-supply = <&reg_audio_board>;
     		DVDD-supply = <&reg_audio_board>;
     		dsd-path = <1>;
    +		status = "disabled";
     	};
     
     	ov5640_mipi: ov5640_mipi@3c {
    @@ -688,6 +755,7 @@
     			};
     		};
     	};
    +
     };
     
     &i2c4{
    @@ -777,7 +845,6 @@
     			csis-clk-settle = <2>;
     			csis-wclk;
     		};
    -
     		csi1_mipi_ep: endpoint@2 {
     			remote-endpoint = <&csi1_ep>;
     		};
    @@ -854,14 +921,25 @@
     	assigned-clock-rates = <24576000>;
     	status = "okay";
     };
    -
    +/*
    +&sai1 {
    +        #sound-dai-cells = <0>;
    +        pinctrl-names = "default";
    +        pinctrl-0 = <&pinctrl_sai1>;
    +        fsl,sai-mclk-direction-output;
    +        assigned-clocks = <&clk IMX8MM_CLK_SAI1>;
    +        assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
    +        assigned-clock-rates = <12500000>;
    +        status = "okay";
    +};
    +*/
     &sai1 {
     	pinctrl-names = "default", "dsd";
     	pinctrl-0 = <&pinctrl_sai1>;
     	pinctrl-1 = <&pinctrl_sai1_dsd>;
     	assigned-clocks = <&clk IMX8MM_CLK_SAI1>;
     	assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
    -	assigned-clock-rates = <49152000>;
    +	assigned-clock-rates = <12288000>;
     	clocks = <&clk IMX8MM_CLK_SAI1_IPG>, <&clk IMX8MM_CLK_DUMMY>,
     		<&clk IMX8MM_CLK_SAI1_ROOT>, <&clk IMX8MM_CLK_DUMMY>,
     		<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_AUDIO_PLL1_OUT>,
    @@ -1177,37 +1255,35 @@
     		>;
     	};
     
    +       pinctrl_audio_reset: pinctrl_audio_reset {
    +               fsl,pins = <
    +                       MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28         0x16
    +               >;
    +       };
    +
    +       pinctrl_audio_reset_31xx: pinctrl_audio_reset_31xx {
    +               fsl,pins = <
    +                       MX8MM_IOMUXC_SAI1_RXC_GPIO4_IO1         0x16
    +               >;
    +       };
    +
     	pinctrl_sai1: sai1grp {
     		fsl,pins = <
    -			MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK	0xd6
    -			MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC	0xd6
    -			MX8MM_IOMUXC_SAI1_RXD7_SAI1_TX_SYNC	0xd6
    -			MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD1_SAI1_TX_DATA1	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD2_SAI1_TX_DATA2	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD3_SAI1_TX_DATA3	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD4_SAI1_TX_DATA4	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD5_SAI1_TX_DATA5	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD6_SAI1_TX_DATA6	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD7_SAI1_TX_DATA7	0xd6
    +			MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK	0xd6 /*MCLK*/
    +			MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC	0xd6 /*WCLK*/
    +			MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK	0xd6 /*BCLK*/
    +			MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0	0xd6 /*DIN*/
    +			MX8MM_IOMUXC_SAI1_RXD0_SAI1_RX_DATA0    0xd6 /*DOUT*/
     		>;
     	};
     
     	pinctrl_sai1_dsd: sai1grp_dsd {
     		fsl,pins = <
    -			MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK	0xd6
    -			MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC	0xd6
    -			MX8MM_IOMUXC_SAI1_RXD7_SAI1_TX_DATA4	0xd6
    -			MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD1_SAI1_TX_DATA1	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD2_SAI1_TX_DATA2	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD3_SAI1_TX_DATA3	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD4_SAI1_TX_DATA4	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD5_SAI1_TX_DATA5	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD6_SAI1_TX_DATA6	0xd6
    -			MX8MM_IOMUXC_SAI1_TXD7_SAI1_TX_DATA7	0xd6
    +			MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK	0xd6 /*MCLK*/
    +			MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC	0xd6 /*WCLK*/
    +			MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK	0xd6 /*BCLK*/
    +			MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0	0xd6 /*DIN*/
    +			MX8MM_IOMUXC_SAI1_RXD0_SAI1_RX_DATA0    0xd6 /*DOUT*/
     		>;
     	};
     
    @@ -1222,10 +1298,11 @@
     
     	pinctrl_sai3: sai3grp {
     		fsl,pins = <
    -			MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC     0xd6
    -			MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK      0xd6
    -			MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK        0xd6
    -			MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0     0xd6
    +			MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC     0xd6 /*WCLK*/
    +			MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK      0xd6 /*BCLK*/
    +			MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK        0xd6 /*MCLK*/
    +			MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0     0xd6 /*DIN*/
    +			MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0     0xd6 /*DOUT*/
     		>;
     	};
     
    diff --git a/arch/arm64/configs/imx_v8_android_defconfig b/arch/arm64/configs/imx_v8_android_defconfig
    index a4771d2..edcbaf0 100644
    --- a/arch/arm64/configs/imx_v8_android_defconfig
    +++ b/arch/arm64/configs/imx_v8_android_defconfig
    @@ -574,6 +574,8 @@ CONFIG_THERMAL_WRITABLE_TRIPS=y
     CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
     CONFIG_CPU_THERMAL=y
     CONFIG_THERMAL_EMULATION=y
    +CONFIG_SND_SOC_TLV320AIC31XX=y
    +CONFIG_SND_SOC_TLV320AIC3X=y
     CONFIG_IMX_SC_THERMAL=y
     CONFIG_IMX8MM_THERMAL=y
     CONFIG_DEVICE_THERMAL=y
    @@ -819,7 +821,7 @@ CONFIG_HID_ZYDACRON=y
     CONFIG_USB_HIDDEV=y
     CONFIG_I2C_HID=m
     CONFIG_USB_CONN_GPIO=y
    -CONFIG_GPIO_RESET_CONTROLLER=y
    +CONFIG_GPIO_RESET_CONTROLLER=n
     CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
     CONFIG_USB_OTG=y
     CONFIG_USB_XHCI_HCD=y
    diff --git a/sound/soc/codecs/tlv320aic31xx.c b/sound/soc/codecs/tlv320aic31xx.c
    index 5ac7ce2..1fe97d9 100644
    --- a/sound/soc/codecs/tlv320aic31xx.c
    +++ b/sound/soc/codecs/tlv320aic31xx.c
    @@ -213,10 +213,12 @@ struct aic31xx_rate_divs {
     	/* 44.1k rate */
     	{12000000,  44100,	7, 5264,	128,   8,  2,	128,   8,  2},
     	{12000000,  44100,	8, 4672,	128,   6,  3,	128,   6,  3},
    +	{12288000,  44100,      7, 5264,        128,   8,  2,   128,   8,  2},
     	{12500000,  44100,	7, 2253,	128,   8,  2,	128,   8,  2},
     	/* 48k rate */
     	{12000000,  48000,	8, 1920,	128,   8,  2,	128,   8,  2},
     	{12000000,  48000,	7, 6800,	 96,   5,  4,	 96,   5,  4},
    +	{12288000,  48000,      8, 1920,        128,   8,  2,   128,   8,  2},
     	{12500000,  48000,	7, 8643,	128,   8,  2,	128,   8,  2},
     	/* 88.2k rate */
     	{12000000,  88200,	7, 5264,	 64,   8,  2,	 64,   8,  2},
    

  • please provide table settings.

  • Thanks shen.

    With -

    /* 48k rate */
    {12280000, 48000, 8, 1920, 128, 8, 2, 128, 8, 2},

    I was not getting any output from spkr.

    But when I was trying to play something unmute function was getting called.

    Could you please check above data and share your input.

    If you check above i2cdump, most of the things are power down after bootup. Proper mclk and sample rate will solve this problem? 

    Thanks.

  • Hi Peter

    We need your support om register setting

  • latest array settings:

  • Hi shen,

    Measured clocks:

    MCLK - 12.288Mhz

    BCLK - 1.53Mhz

    WCLK - 48Khz

    tlv320aic31xx-codec 1-0018: >>  tlv pll 8.0000/1 dosr 32 n 1 m 8 aosr 32 n 1 m 8 bclk_n 8

    With few tinymix command, I'm able to get audio at the speaker output. Noise it there.

    But instead of tinymix command, it should be done by audio driver right ?

    What needs to be done next ?

    Thanks