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TLV320AIC3107: I2S tr, tf requierment

Part Number: TLV320AIC3107
Other Parts Discussed in Thread: TLV320AIC3007, TLV320DAC3100

Hello,

In the case of our project, TLV320AIC3007 is used in slave mode and DSP’s I2S output port characteristics cannot meet 4ns max of tf and tr requirements.
Referring TLV320DAC3100 tr, tf discussion on E2E, can we relax tr, tf requirements which depend on I2S clock frequency?

TLV320AIC3007 tr, tf specification are also 4ns max, it is 10% of 25MHz MCLK max frequency.
This time we are using LRCK=44.1kHz, BCLK=64fs=2.8224MHz and MCLK=256fs=11.2896MHz.
If reflect 10% rule from clock frequency, tr and tf requirements will be LRCK 2267ns, BCLK 35.4ns and MCLK 8.9ns. Is this correct understanding?

Regards,

Mochizuki