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TLV320DAC3203: Maximum BCLK value for TDM Application

Part Number: TLV320DAC3203


I need to use TLV320DAC3203 in TDM mode, slave, SR = 96 kHz, and the master device will generate a frame with 256.fs, i.e., bclk = 24,576 MHz. The reason for that high blck frequency is because the master device carries 8x slots of 24/32 bits different audio sources. The offset resource in TLV320DAC3203 allows me to select the desired source.

In TLV320DAC3203 documentation, blck_min_hi_period and bclk_min_low_period = 35 ns, which gives a maximum frequency of about 14,3 MHz.

Is there any form to accomplishes that issue, other than reducing SR to 48 kHz?

Thanks a lot, regards,