TLV320AIC3204: TLV320AIC3204EVM :How to use two mics to route to HP and LO respectively?

Hi Luo,

To troubleshoot, begin with confirming power to the IC, and confirm correct I2S clock frequencies. Then test record and playback path individually.

Ensure a clean signal is provided to IN1 and test the record path only, confirm valid data is on DOUT. Repeat the same for the playback path. Scripts are available in the typical configurations tab of the AIC3204 GUI.

Regards,

Hi Daveon,

I connected IN1 with the same bias voltage and pull-down resistor as IN3. Now the sound of IN1 can be routed to LO, and IN3 can be routed to HP. HP can normally produce ambient stereo effect, but LO has no ambient stereo effect. Is there anything wrong with my register configuration? Please take a look at it for me. Thank you very much.

Regards.

Hi Luo,

I will look into register config more during my day time. However, for testing please isolate recording and playback script to ensure each signal path is working correctly. Also the order of writes is important, AGC should follow power-up/unmute of ADC and DAC and please confirm on oscilloscope the clocks are correct.

Hi Daveon,

Does isolating recording and playback scripts means setting Page 0 registers 60 to 0，not using a signal processing block? When I set it to 0, my mic and headphones stop working. How do I test?

Regards.

Hi Luo,

By isolating, I mean verify the ADC path along with any audio processing settings is working correctly before looping to the DAC signal path. 

There are preset scripts given in the AIC3204 GUI, that you can use as a starting point. Then modify/add registers as need be.

Audio recording (ADC path) example:

###############################################
# High Performance Stereo Recording
# ---------------------------------------------
# PowerTune mode PTM_R4 is used for high
# performance 16-bit audio. 
#
# For normal USB Audio, no hardware change
# is required.
#
# If using an external interface, SW2.4 and
# SW2.5 of the USB-ModEVM must be set to
# HI and clocks can be connected to J14 of
# the USB-ModEVM.
#
# IN1L/R is routed to the LADC/RADC in a
# single-ended manner.
###############################################



###############################################
# Software Reset
###############################################
#
# Select Page 0
w 30 00 00
#
# Initialize the device through software reset
w 30 01 01
#
###############################################



###############################################
# Clock Settings
# ---------------------------------------------
# The codec receives: MCLK = 11.2896 MHz,
# BLCK = 2.8224 MHz, WCLK = 44.1 kHz
###############################################
#
# Select Page 0
w 30 00 00
#
# NADC = 1, MADC = 2
w 30 12 81 82
#
###############################################



###############################################
# Signal Processing Settings
###############################################
#
# Select Page 0
w 30 00 00
#
# Set the ADC Mode to PRB_P1
w 30 3d 01
#
###############################################



###############################################
# Initialize Codec
###############################################
#
# Select Page 1
w 30 00 01
#
# Disable weak AVDD in presence of external
# AVDD supply
w 30 01 08
#
# Enable Master Analog Power Control
w 30 02 00
#
# Select ADC PTM_R4
w 30 3d 00
#
# Set the input powerup time to 3.1ms (for ADC)
w 30 47 32
#
# Set the REF charging time to 40ms
w 30 7b 01
#
###############################################



###############################################
# Recording Setup
###############################################
#
# Select Page 1
w 30 00 01
#
# Route IN1L to LEFT_P with 20K input impedance
w 30 34 80
#
# Route Common Mode to LEFT_M with impedance of 20K
w 30 36 80
#
# Route IN1R to RIGHT_P with input impedance of 20K
w 30 37 80
#
# Route Common Mode to RIGHT_M with impedance of 20K
w 30 39 80
#
# Unmute Left MICPGA, Gain selection of 6dB to make channel gain 0dB
# Register of 6dB with input impedance of 20K => Channel Gain of 0dB
w 30 3b 0c
#
# Unmute Right MICPGA, Gain selection of 6dB to make channel gain 0dB
# Register of 6dB with input impedance of 20K => Channel Gain of 0dB
w 30 3c 0c
#
# Select Page 0
w 30 00 00
#
# Power up LADC/RADC
w 30 51 c0
#
# Unmute LADC/RADC
w 30 52 00
#
###############################################

Hi Daveon,

I added the configuration of DAC playback on the script you provided, connected the computer with EVM, HP and LO played the audio of the computer, and the volume of HP played was higher than that of LO. Then the environment stereo configuration is added, LO can output the stereo gain effect, but the stereo gain effect of LO is also lower than that of HP. I checked the peripheral circuit of EVM LO and HP, and found that the resistors and capacitors used are different. My question is:

1. Does the difference in the volume of LO and HP result from the difference in their peripheral circuits? If the peripheral circuit of LO is modified to be consistent with that of HP, can they output the same volume?

2, LO starts to play AGC gain pop sound how to solve?

PS: My requirement now is to use IN3 and IN1 corresponding to HP and LO respectively as the left and right channels to output the same ambient stereo gain effect, without involving the transmission of audio.

The following register configuration is for EVM to play computer audio through HP and LO:

###############################################
# High Performance Stereo Recording
# ---------------------------------------------
# PowerTune mode PTM_R4 is used for high
# performance 16-bit audio. 
#
# For normal USB Audio, no hardware change
# is required.
#
# If using an external interface, SW2.4 and
# SW2.5 of the USB-ModEVM must be set to
# HI and clocks can be connected to J14 of
# the USB-ModEVM.
#
# IN1L/R is routed to the LADC/RADC in a
# single-ended manner.
###############################################



###############################################
# Software Reset
###############################################
#
# Select Page 0
w 30 00 00
#
# Initialize the device through software reset
w 30 01 01
#
###############################################



###############################################
# Clock Settings
# ---------------------------------------------
# The codec receives: MCLK = 11.2896 MHz,
# BLCK = 2.8224 MHz, WCLK = 44.1 kHz
###############################################
#
# Select Page 0
w 30 00 00
#
# NADC = 1, MADC = 2
w 30 12 81 82
#
###############################################


###############################################
# Signal Processing Settings
###############################################
#
# Select Page 0
w 30 00 00
#
# Set the ADC Mode to PRB_P1
w 30 3d 01
#
###############################################



###############################################
# Initialize Codec
###############################################
#
# Select Page 1
w 30 00 01
#
# Disable weak AVDD in presence of external
# AVDD supply
w 30 01 08
#
# Enable Master Analog Power Control
w 30 02 00
#
# Select ADC PTM_R4
w 30 3d 00
#
# Set the input powerup time to 3.1ms (for ADC)
w 30 47 32
#
# Set the REF charging time to 40ms
w 30 7b 01
#
###############################################



###############################################
# Recording Setup
###############################################
#
# Select Page 1
w 30 00 01

# Route IN1L to LEFT_P with 20K input impedance
w 30 34 80
#
# Route Common Mode to LEFT_M with impedance of 20K
w 30 36 80
#
# Route IN1R to RIGHT_P with input impedance of 20K
w 30 37 80
#
# Route Common Mode to RIGHT_M with impedance of 20K
w 30 39 80
#
#
# Unmute Left MICPGA, Gain selection of 6dB to make channel gain 0dB
# Register of 6dB with input impedance of 20K => Channel Gain of 0dB
w 30 3b 0c
#
# Unmute Right MICPGA, Gain selection of 6dB to make channel gain 0dB
# Register of 6dB with input impedance of 20K => Channel Gain of 0dB
w 30 3c 0c
#
# Select Page 0
w 30 00 00
#
# Power up LADC/RADC
w 30 51 c0
#
# Unmute LADC/RADC
w 30 52 00
#
###############################################
###############################################
# High Performance Stereo Playback
# ---------------------------------------------
# PowerTune mode PTM_P3 is used for high
# performance 16-bit audio. For PTM_P4,
# an external audio interface that provides
# 20-bit audio is required.
#
# For normal USB Audio, no hardware change
# is required.
#
# If using an external interface, SW2.4 and
# SW2.5 of the USB-ModEVM must be set to
# HI and clocks can be connected to J14 of
# the USB-ModEVM.
#
# Audio is routed to both headphone and
# line outputs.
###############################################

###############################################
# Clock Settings
# ---------------------------------------------
# The input clock signal : MCLK = 11.2896 MHz,BLCK = 1.4 MHz, WCLK = 44.1 kHz: MCLK = 11.2896 MHz,
###############################################
#
# Select Page 0
w 30 00 00
#
# NDAC = 1, MDAC = 2
w 30 0b 81 82
#
###############################################

###############################################
# Signal Processing Settings
###############################################
#
# Select Page 0
# w 30 00 00
#
# Set the DAC Mode to PRB_P8
w 30 3c 08
#
###############################################

###############################################
# Playback Setup
###############################################
#
# Select Page 1
w 30 00 01
#
# De-pop
w 30 14 25
#
# Route LDAC to HPL/HPR
w 30 0c 08 10
#
# Route RDAC to LOL/LOR
w 30 0e 10 08
#
# Power up HPL/HPR and LOL/LOR drivers
w 30 09 3c
#
# Unmute HPL/HPR driver, 0dB Gain
w 30 10 00 00
#
# Unmute LOL/LOR driver, 0dB Gain
w 30 12 00 00
#
# Select Page 0
w 30 00 00
#
# DAC => 0dB
w 30 41 00 00

#
#
# Power up LDAC/RDAC
w 30 3f d6
#
# Unmute LDAC/RDAC
w 30 40 00
#
###############################################

Regards.

Can you answer my question?

Hi Luo,

1. Audio performance can be quantified by SNR,DR, and THDN. This can affect the perceived loudness of the output so please note the difference in the specifications in the electrical characteristics table. Also note the test conditions and loads used. Additionally, the RC filters present on the output do affect the output as the output drivers are designed for different loads and use cases (i.e class d amplifier, headphone amp, speaker, etc.)

2. For trouble shooting:

• Does this pop occur when AGC is disabled?
• What is the max gain applied to the signal? What is the input signal level