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TLV320ADC3120: TDM data spec check

Part Number: TLV320ADC3120

Tool/software:

Hi team,

My customer is testing the ADC spec; since their current frequency is high ~24MHz, so close to our part boundary. The tHBCLK and tLBCLK spec get to ~20ns. 

They are checking the note(1), that could extend the BCLK high and low spec to 14ns. Could you help understand what does it mean "SDOUT data line is latched on the same BCLK edge polarity as the edge used by the device to transmit SDOUT data." ? How could we know if the set up meet the requirement or not?

Thanks and best regards,

Will