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Tas5630 Lowest Impedance on BTL 2.1 configuration?

Yosef Matahen
Prodigy 10 points

Hi. Im building a 2.1 speaker and want to know the absolute lowest load i can run safely on the 2.1 configuration. The datasheet shows in BTL mode that a sun at 4ohm can output up to 300 watt but does not specify the output at 2ohm. The datasheet does show that 2 ohms can be run in single ended outputs as well as PBTL mode but only has 4ohm as the lowest on BTL mode. Why is that? And how low can i go and how much power will be inconsistently output if  the BTL was at 2 and the single eneded outputs were also at 2 with a 48-50v supply voltage?

Thanks

  • 0
    TI__Genius 9175 points
    Hello,

    1. The main consideration when determining acceptable load vs power is output current. 4ohms is the recommended minimum load in BTL due to the size (Rds-on) of the output FETs. The lower the load impedance, the higher the output current and the more heating of the device due to power dissipation in the output FETs.

    Therefore, to run the amplifier with 2Ohm in BTL, the amplifier cannot be driven into voltage clipping (10% THD) as in the 4Ohm case. The current will be too high. However, the amplifier can run into 2ohm load assuming the RMS current is not increased from the 4ohm case.

    4ohm 300W = 8.6A RMS; assuming the same current into 2ohms = 147W

    This is a general rule of thumb but in practice actual acceptable power levels may be different. The efficiency of the amplifier will also be reduced with lower impedance loads since the ratio of speaker impedance to RDS-on of the output FETs is less. This is a voltage division effect with the Rds-on in series with the speaker.


    2. SE supports lower impedance load is due to the fact that in BTL, the speaker is connected in a full bridge configuration where 2x RDS-on is in series with the load. In SE mode, (½ bridge configuration) only one FET or 1x RDS-on is in series with the load. Also in SE mode, the maximum output voltage is reduced by 1/2 so the power into lower Z loads is naturally limited.

    3. In PBTL mode, output FETs are paralleled so current to the load can be doubled.

    Best Regards,
    Matt