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PCM1865: PCM1865 noise problem

Part Number: PCM1865

Hello, we are using the PCM1865A configured in a four single ended inputs mode for microphone acquisition.

We noticed a noise problem and in the search for it, we basically removed all the front end components (only passive), ending with the PCM1865 input connected to the GND plane. The noise is still present. See images in the  attached file.

Then we connect the input to the PCM1865 REF pin and the noise disappears. See last image in the attached file.

We are quite puzzled by this results as it would indicate a device internal noise source that is nullified when acquiring VREF rather than GND, while the actual measure is (IN - VREF) as shown by the device MUX function in its datasheet. On in other words that noise source is present on the VREF input.

We tried some changes around the PCM1865 power supply (tie to an external linear lab PSU), decoupling (VREF and power supply) without any succeess.

Does somebody have a suggestion about the possible noise source given the above experiment result ?

Best regards

PCM1865 Noise drawing.docx

  • Hi, Pascal,

    Thanks for the detailed information. In order to find the issue, it would be useful to have some captures of the VREG pin and power supplies to identify any problem. Also, checking analog and digital ground planes for any noise coupling would be useful. Can you please send me your schematic/layout for review?

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • Hello Diego,
     
    Could you please provide a private email address for the schematic delivery ?
     
    Pascal
     
  • Hi, Pascal,

    Please send the information to diego.melendez@ti.com

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • Hello Diego, I've sent you the schematic.

    How critical is the VREF node for the device performance (especially looking for -80/-90dB phenomenas) ?

    What is this VREF voltage for ? Is it only for input biaising or is it also involved with the ADC reference voltage for signal conversion ?

    In our PCB routing, the VREF pin connects to a VIA that goes through the PCB. On its way, it crosses GND planes and one power supply plane.

    We have a 150um clearance between the VIA and the plane. I am wondering if there could be a noise coupling at that level although the loading impedance are low. What is TI opinion on this ? 

    Pascal

  • Hi, Pascal,

    VREF pin is used as the decoupling point for the internally regulated ADC reference power supply. The inputs of the ADC are referenced to 0.5×AVDD. We usually recommend to connect the decoupling capacitor as close as possible to this pin to avoid noise coupling issues. If the decoupling capacitor is located in the bottom of the board, the decoupling effect would be mitigated. When the inputs are connected to VREF, the noise disappears because the reference is VREF. 

    I reviewed the schematic and it seems there are not DC blocking capacitors connected to the MIC inputs. We recommend to use DC blocking capacitors to ensure that the DC bias conditions are known so the device can operate as expected. Other than this, I have no other comment.

    Best Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • Diego, thanks for the explanation.
    Blocking capacitors are on the first page of the schematic (10uF).
    I’ll run some experiments around the VREF pin and let you know the result.
     
    Thanks
    Pascal
     
  • Diego, I've finaly run some more experiments.

    First of all, the cap for VREF decoupling has been soldered directly between VREF and AGND on the part itself, completly isolating the VREF from the board. No change. Please note that the tested input below has nothing connected to but what is described below.

    #1: Vin with no connection: no noise appears on the acqusition
    #2: Vin connected with a 1nF cap to AGND on the PCM1865A itself: noise appears on the acquisition
    #3: Vin same as #2 with a 1uF cap to VREF: no noise (at least cannot be seen on our FFT)

    My understanding at this point is that for single ended inputs, the ADC converts the signal (Vin - VREF). Is that correct ?
    If I have noise on VREF, then in #1 and #3, Vin has the same noise as VREF and the acquisition reflects this. In #2, I have a different noise content on Vin and VREF and what I observe is the difference.

    What puzzled me again is that if VREF is the reference voltage for the ADC, noise on VREF might be seen on the acquisition because of ADC reference noise? Or is the ADC rejects its reference noise somehow ?

    Finally, I would appreciate some insight on the potential sourev to look at because just that simple configuration (cap between Vin and GND) results in output noise.

    Best regards
    Pascal