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TPA3118D2-Q1: Timing Requirement for TPA3118D2-Q1

yoshiki hasebe
Mastermind 6385 points
Part Number: TPA3118D2-Q1

Dear Sirs,

My asked us about Timing Requirement  for TPA3118D2-Q1.

So, 

I have a question about Timing Requirement on page 7 of the data sheet of TPA3118D2-Q1.

There is no description of the reason for >1.4s in the data sheet.

Please tell me the reason why you need to be >1.4s.

Also,what will happen if it deviates from this standard?

Best Regards,

Y.Hasebe

  • 0
    TI__Mastermind 24835 points
    Hi Hasebe-san,
    This timing requirement has to be followed when a MCU is used to control the AMP. When a over-current fault is triggered, FAULT pin is driven to Low, then the MUTE pin is driven to High(the inverting of FAULT signal is assigned to MUTE pin inside the MCU), this ensure a high-Z restart. The 1.4s is the system auto-recovery time when an OC event is detected. After the OC event, the IC will try to re-start after 1.4s and return to normal operation if the fault condition is removed. If this is a permanent short from the output to PVDD, then assert MUTE before SDZ goes low when FAULTZ is asserted.
    This timing requirement needs to be followed to guarantee the reliability of the IC.
    Best regards,
    Shawn Zheng
  • 0 in reply to Shawn Zheng
    Mastermind 6385 points

    Hello Shawn-san,

    Thank you for your  reply.

    I understand your comments.

    I will explain these comments to my customer.

    Best Regards,

    Y.Hasebe