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TAS5614: Channel Cross-Coupling

Gordon McKenzie
Intellectual 580 points
Part Number: TAS5614

Hello,

I'm currently using the TAS5614LA in a design with all 3 mode pins set low, so configured as 2 x BTL with differential input PWM. At a basic level, the device works, but recently when I've been looking for greater precision, I've found that there is a cross coupling effect from channel AB to channel CD.

See video attached below, which shows the two sides of the output PWM on channel CD (red and green), and one side of the output PWM on channel AB. Channel AB is driven with a very slow drive waveform (artificially slow, so that it can be seen) and the PWM of the blue signal can be seen to vary as intended. However, there is also an undesired variation in the PWM of the red signal (OUT_C). The oscilloscope is triggered on the green signal (OUT_D) which is stable.

I don't see any mention of cross-coupling in the datasheet. Is this behaviour expected, and if so, is there anything I can do to get rid of it?

Thanks,

Gordon.

  • 0
    TI__Mastermind 22660 points
    Hi Gordon,

    Is this an EVM that you are testing this on or your own board?

    Regards,
    Robert Clifton
  • 0 in reply to Robert Clifton56
    Intellectual 580 points

    Hi Robert,

    It's on my own board that I'm seeing this.

    Another point to note is that the board is normally set up with the same 28V supply to both channels, but I've also tried it with separate supplies (channel CD powered from a completely separate bench PSU) and it makes no difference at all. The effect is exactly the same when both channels are put on no-load , so it doesn't seem to be due to any issue with dips in the 28V supplies.

    I've checked the two PWM inputs on channel CD (i.e. the PWM singals I supply to the TAS5614LA), and under the conditions for which the above video was taken, both are set bang on 50% with no variation. It therefore seems that the problem is not with the input signals. It does seem odd that only the falling edge of OUT_C is affected. OUT_D looks fine, and the rising edge of OUT_C (not shown) also seems OK.

    Please let me know if this description suggests any particular issue that I might be missing.

    Thanks,

    Gordon.

  • 0 in reply to Gordon McKenzie
    TI__Mastermind 22660 points
    Hi Gordon,

    Hmmmm. Do you have an EVM? This might help with the debug process. If you have an EVM board you can test that with the same power supplies, load, and other test conditions. This would help figure out if there's possibly a layout issue or something else going on in the system.

    Regards,
    Robert Clifton