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TLV320AIC3204EVM-K: Decoding Issue

Part Number: TLV320AIC3204EVM-K
Other Parts Discussed in Thread: TLV320AIC3204

Hello,

I develop an application to sample data from a generator signal using a STM32 microcontroller and TLV320AIC3204EVM-K for Analog to Digital Converter. Here is my configuration:

The STM32 Microcontroller works as master, so it provides WCLK, MCLK and BCLK to ADC. I use the following setup for the clock frequencies:

WCLK = 12.2 kHz

MCLK = 3.125 MHz

BCLK = 390.6 kHz

For ADC programming, I use an example code from TLV320AIC3204 Application Reference Guide:

Then I observe the data sent by ADC with oscilloscope:

The blue signal is analog input signal

The green signal is WCLK

The yellow signal is BCLK

The red signal is DOUT

All the clock frequencies are OK. I also get the bit sequences for both left channel (2 V) and right channel (ground level). The problem is I do not get the correct ADC value after I decode the data. For channel 00 (2 V) the bit sequence does not represent a constant hexadecimal value (or at least it only changes a little caused by noise). For channel 01 (ground level) I always get a bit sequence of 0xFFC5 or 0xFFC4 while I expect 0x0000 sent from ADC. Could you help me to solve this issue? Or maybe you have a sample code to sample a clean signal? I think the code that I used does some filtering and some other processes that can alter the mapping from original signal to ADC value.

  • Hi Arya,

    The code you are using assumes a 48kHz sample rate with a 12.288MHz MCLK and does not use the PLL. Since your configuration is different, you may need to adjust some of the dividers. How did you select the clock rates you are using? Unless these values are rounded, they do not seem to be valid multiples of one another, which is required if you are not using the PLL.

    Another thing to note is that all of the inputs have AC coupling capacitors, and unless you are bypassing these, a DC input signal will be filtered out. You could start with a 0.1Vrms sine wave to see if this is captured correctly.

    Best,

    Zak

  • Hi Zak,

    My input MCLK is 3.125 MHz. So using the same value of dividers as in the code, I should get the same sampling frequency by selecting MCLK as the source. More precisely, my sampling frequency is 12.20703125 kHz.

    Regarding the AC coupling capacitors, I do not realize it until I read the schematic. Thanks a lot! That's why I feel strange as my data sampling never works with low frequency rectangular wave. So now I change the input now to 3 Vpp sine wave with the frequency of 2 kHz. Now the bit sequence is more explainable. Here is the result of decoded bit sequence (left channel):

    7FFF
    7FFF
    1977
    8000
    8000
    FEB5
    7FFF
    7FFF
    2D5B
    8000
    8000
    E9EF
    7FFF
    7FFF
    4026
    8AAE
    8000
    D59C
    7DF7
    7FFF
    518A
    9922
    8000
    C21A

    Just to confirm, is this 2's complement representation of 16 bit integer? I can't find any details about the bit format in the datasheet but If I use this representation, I can convert it to the correct analog input voltage.

    Best,

    Arya

  • Hey Arya,

    Thanks for clarifying and providing an update, glad that the issue is resolved. Yes, I don't think the datasheet mention it but the I2S protocol requires formatting data in binary two's complement and this same convention is used for the other output formats as well.

    Best,

    Zak

  • Hi Zak,

    I have another question regarding the code that I am using currently, particularly these registers on Page 1:

    Is this procedure must be executed regardless the input signal? I will sample a vibration sensor later, should I make any changes?

    Best,

    Arya

  • Hi Arya,

    I think you will need to do some testing to decide what settings work best with your sensor. The script provided is for stereo single-ended inputs, if you are using a differential sensor then you would want to change some of the routings to support a differential input. You will probably also want to apply some gain with the PGA to amplify the sensor signal and possibly adjust the input impedance of the ADC depending on the impedance of your sensor. There's also the DAC settings if you intend to use this functionality of the codec. If not, then you may be better off using one of our ADC products that does not include the DAC.

    Best,

    Zak

  • Hi Zak,

    Thanks, that is very helpful! My lab will design a pcb using the same ADC chip on this evaluation board, so I need to gather a lot of information. Regarding the impedance, how should I adjust the impedance? The impedance of my signal generator is 50 Ohm, is there a formula/guideline to pick the correct value?

    And this is my final question for my current test. I set the input to 3 Vpp sine wave @ 10 Hz. Here is the signal captured from oscilloscope:

    I do the sampling with 12,2 kHz frequency. Then it is turned out that the reconstructed signal is saturated like this:

    When I use the raw data and plot them, I have the same phenomena. Is this possibly because quantization error due to resolution limitation or something else?

    Best,

    Arya

  • Hey Arya,

    If you have a 50 Ohm source then the input impedance is not an issue. Generally you want to set the input impedance to the lowest value you can for the best noise performance, but higher impedance options are available if your source impedance is high.

    For your data capture, this is because you have saturated the input PGA. The full scale input range of the TLV320AIC3204 is 0.5 Vrms, or 1.414 Vpp in single-ended mode, and this will change depending on your PGA gain settings. If you reduce your input amplitude, you should not see this issue.

    Best,

    Zak