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TAS2559: Description of reserved bit in register INT_DET_1

Part Number: TAS2559


I have previously asked for a specification of bit 5 in register INT_DET_1 (see Q/A below). However, I have found an other specification of the bit in the Android driver (from TI) [2]. The Android driver says that the bit means "CLK Halted".

Can you tell me the exact definition of bit 5 in register INT_DET_1 (B0P0R104) ?

When and why does the codec sets this bit ? 
What do you have to do to recover from this error condition ? The Android driver seems to the reset the codec in this case, but I have experienced that it is possible to recover from this error condition, by resetting the DSP (by toggling bit 7 in register POWER_1 (B0P0R04)).

Best regards
Frank Rolsted Jensen


Q: In INT_DET_1 (B0P0R104) bit 5 (reserved) is set. I think this bit means "CLK HALTED". Please confirm and describe what it means (which clock is halted).

A: This Bit is related to the Boost Over-current detection:

D5 Reset: 0  0 Boost Over-current is not detected
  1 Boost Over-current is detected