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Original question:

LMX2594: 2 LMX2594 frequency locked output

LMX2594: Output clocks' stabilization time required

Pradeepkumar Selvaraj1
Prodigy 200 points
Part Number: LMX2594

Hi,

We are developing precision Location measurement unit. In that we are using two LMX2594 to generate four output clocks of 452.95MHz, used as ADC clock inputs. The first LMX IC's two clock outputs are given to one set of ADCs, and another LMX IC outputs are given to another set of ADCs in RFSoC.

We need to know the clock output stabilization time of the LMX2594, so that we will start sampling the ADCs after this time period to avoid seeing phase misaligned values. Also we can be little confident that both chip outputs are stable. I cannot find it from the datasheet. Could you please provide this detail.?

Thanks,

Pradeep. S

  • 0
    TI__Guru** 107030 points

    Hi Pradeep,

    I assume you were talking about the time between complete register programming and a stable clock output is available. 

    After programming the last required register - R0, the VCO will calibrate and the PLL will lock. The time taken for this process is equal to the VCO calibration time + the PLL lock time. 

    VCO calibration time depends on the "state machine" clock frequency, details can be found in SNAA336.

    Lock time is approximately equal to 4/loop filter bandwidth. For example, if the loop bandwidth is 100kHz, then the lock time is about 40µs.

    You can also use PLL Sim to estimate the overall calibration time + lock time.