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CDCE6214: Frequency calculation issue

Part Number: CDCE6214
Other Parts Discussed in Thread: CLOCK-TREE-ARCHITECT, CDCM6208, LMK03318

Hello Team,

I am using CDCE6214 for clock generation on our board and TICS Pro SW 1.7.2 to create configuration file to control it.

Our board, and so TICS Pro configuration too, is provided with the following data parameters:

PLL Ref = 27MHz

SSC=DCO Mode= not enabled

OUT0=not enabled

OUT1=not Powerdown

OUT2=Powerdown

OUT3=Powerdown

OUT4=Powerdown

Channel Muxes=PSA

So, the only active output is OUT1.

Could you please explain why it seems not possible to set 176MHz output frequency with aformentioned parameters?

The SW seems to refuse to apply the input above and "Calculate Frequency Plan" button produce the following error message : "Error 0MHz cannot be gerated by existing prescaler / output divider values" , while for frequency below 176MHz and above 191MHz seems to work fine.

Also, please let me know why even changing the PLL Ref frequency seems not to allow the SW to work with this frequency(176MHz), am I missing something?

Thanks

Best Regards,

Fabio

  • Hi Fabio,

    Unfortunately 176MHz cannot be generated by this device. This is because the prescalers (PSA and PSB) and the output dividers are integers. In order to get 176MHz, the only VCO frequency (which must be 1. within VCO frequency range and 2. be an integer multiple of 176MHz) is 2464MHz. However, 2464/176 = 14. We'll then need a prescaler of 2 or 7. But prescalers can only be 4, 5 or 6. 

    You can use clock tree architect to find a solution. https://www.ti.com/tool/CLOCK-TREE-ARCHITECT

    Regards,
    Hao

  • Hello Hao,

    it's not a single frequency issue, I'm sweeping through frequency and it turns out that, for example, the range between 176MHz-191MHz cannot be reached at all.

    Is this expected behavior?

    Please could you elaborate your answer regarding clock-tree-architect solution?

    The clock-tree-architect tool is stuck at the loading stage and seems not to work on whatever browser/machine, I see on the forum that is a known issue, but I cannot see a solution to get it to work. Please let me know if an offline version for download is available.

    Thanks

    Reagards,

    Fabio

  • Hi Fabio,

    This is indeed expected behavior for CDCE6214 unfortunately due to the limited post divider/prescaler values. Please consider LMK03318 or CDCM6208 instead.

    I'll check internally what's happening with clock tree architect.

    Regards,
    Hao