LMK03328: Confirm the corsstalk warning message and XO input

Hi Wang, 
Yes, you will always get this warning since you identical VCO frequencies. This should not be done, you risk crosstalk with the outputs as well if you have same frequency signals next to each other. If you have identical VCO frequencies, I suggest LMK03318 instead as it has one PLL instead of two. 

Hi Shu,

Regarding the LMK05318:

1. Does the LMK05318 not have same concern? or it has same concern but doesn't shown in the software.
   1. We do have a comment on the outputs page.
   2. It is recommended to assign PLL1 outputs to OUT[0:3] and PLL2 outputs to OUT[4:7].
   3. 
2. Another question is that i used to think the LMK05318 XO input only accept the oscillator. But today i found the XO input also accept the clock from other drivers. is it mean i can connect LMK03328 output to LMK05318 XO input? I need the LMK03328 because i need the reference clock auto switch function and PLL to lock the phase. Does any chip has same function for auto switch and PLL?
   1. It is possible to connect the LMK03328 output to XO input but there are a few considerations:
      1. When there is a loss of reference (no DPLL input), the device enters holdover mode and the outputs are based on the XO frequency accuracy instead of the reference. During holdover, the outputs would have LMK03328 output accuracy.
      2. Using an XO/TCXO/OCXO could provide a more accurate output.
   2. Depending on your application, another method could be:
      
      1. Connect your reference clock to PRIREF input.
      2. Connect LMK03328 output clock to SECREF input.
      3. Connect an XO/TCXO/OCXO to XO input.
      4. The switching priority could be configured as PRIREF → SECREF → XO (holdover).
   3. The LMK05318 provides auto switching functions:
      1. 
      2. 

Regards,

Jennifer

Hi Jennifer

1. I tried to follow the comments for LMK03328, but it still has similar warning. I put identical frequency 80MHz in PLL2, then put 100MHz and 70MHz to PLL1. I think the 100MHz-70MHz isn't in jitter integration bandwidth 20MHz. But sill get warning message about spurs at 10MHz and 20MH. I read a crosstalk information in the software, maybe low output frequency make the spurs? Could you please explain it more for me? i don't understand why the spurs will happen at 10MHz and 20MHz.
   
   
2. About the LMK03328 and LMK05318 combine. We don't wish to use oscillator in our design, and the LMK05318 has to have a XO input no matter with or without the reference clock, it support the basic clock. Our clock are two external clock from system. So I need a clock switch, and input these clock to LKM05318 XO clock directly. I can't do it with one single LMK03328 because i truly have another reference clock to synchronize. So i choose LMK03328 and LMK05318. Do you have another method to do it?

Regards,
Shu

Hi Vicente,

Why the same frequency signals next to each other will have crosstalk risk? you mean the similar frequency, not same frequency, am i right? i should put the same frequency in same group and avoid similar frequency next to each other. i make some change but still gets spurs warning. Could you please help to check the reply above?

Regards,
Shu

Hi Wang, 
Yes, in your case you will always get this crosstalk warning no matter what you do given it is possible for spurs to appear due to possible coupling of first harmonic of 80Mh (80Mhz) and 3rd Harmonic of 20Mhz (60Mhz) at 20MHz=(80Mhz-60Mhz).
You can generate all these outputs from same VCO frequency with LMK03318 to avoid having to use second PLL which can cause issues if identical PLL frequencies are used. I recommend this over LMK03328 unless you require the second PLL. 

Hi Vicente,

Thank you very much.

I make all output to PLL1 but the warning still there. Unless i removed the output5 or output 6 to separate the 100MHz and 20MHz with an empty output channel. Then i did the same  thing on LMK03318 which only have one PLL.  The warning message is same. I think maybe separate the output is the best solution.

I ask this because i am going to use LMK05318 to replace LMK03328 in my design. but the LMK05318 doesn't show me the warning message. i need to know if the LMK05318 doesn't have that concern, or the software forget it. If the LMK05318 doesn't have athat concern, i can use one LMK05318 to replace to LMK03328.

if you saw the message from Jennifer. there are four design comment in the LMK05318 output page. About the first one, the output[0:3] prefer PLL1, and output[4:7] prefer PLL2. Should i follow this comment when the PLL frequency are different? If the PLL frequency are same or similar, i'd best to use same PLL on all output.

About the third comment. i should separate the output when frequency has crosstalk. That why i only can use this way to solve the issue on LMK03328 no matter what PLL i use.

Regards,
Shu

Hi wang,

You will always get this crosstalk warning given the output frequencies you require where there will always be the possibility of harmonic crosstalk even if you separate one of the outputs .

I am not sure why TICSpro doesn't show the warning message for LMK05318. 

Yes, follow those guidelines as it pertains to the output frequencies themselves, not the PLL frequencies. Don't use the same PLL frequency. 

Regards, 

Vicente 

Hi Vicente,

Why there no such warning between 80MHz and 100MHz, the first harmonic are still at 20MHz. The 80MHz at output[0:3] and 100MHz at output[4:5]. output[0:3] on the top side of the chip, and output[4:5] on the bottom side. So I think they are too far to make harmonic crosstalk, or the crosstalk is too small to impact the performance. As you said, it will always be the possibility of harmonic crosstalk, but separate the outputs far can reduce the impact. Am i right?

i should follow the guideline to use PLL1 for output[0:3] and PLL2 for output[4:7]. But in one PLL i should avoid to generate different frequency to make crosstalk. Do i understand it correct?

Regards,
Shu

Hi wang, 
Correct, due to physical distance, you don't need to worry. It is only when you have adjacent outputs when this becomes an issue. 

That is the general guideline for the outputs, yes. Even if you have different PLL VCO frequencies, say if you generate an 80 MHz output from PLL 1 for example and 100 MHz output from PLL 2, you will still get a potential crosstalk warning if these two output frequencies are adjacent to each other. 

Regards, 

Vicente