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LMK04832: SYSREF output pulse width is only about 5~6 nanosecond.

Shi Zhang
Prodigy 30 points
Part Number: LMK04832
Other Parts Discussed in Thread: LMK04821, ,

My LMK04832's SYSREF frequency is configured to 10 MHz. However, single pulse output of SYSREF is quite strange, which has only about 5 to 6 nanosecond pulse width. And no device (e.g. FPGA and JESD204B ADCs) could recognize such a narrow pulse as a sysref. Normally, this pulse width should be 50 nanosecond, when I use similar configuration on LMK04821. 

Is there any different between LMK04832 and LMK04821 to deal with SYSREF duty cycle correction? I cannot find any configuration instruction about SYSREF duty cycle correction.

Here are my configuration of LMK04832. PLZ help me out. Thank you so much.

  • 0
    Prodigy 30 points

    20230418.tcs

    Something wrong with image posting. Here is my configure file of TICS PRO.

  • 0 in reply to Shi Zhang
    TI__Genius 14715 points

    Hi Shi,

    Thanks for the configuration. I have paged our jitter cleaner expert, he will get back to you when he is available.

    Best,

    Evan Su

  • 0 in reply to Evan Su
    TI__Genius 12560 points

    Hi Shi,

    The configuration file looks good and while importing it in the LMK04832EVM setup, it shows correct duty cycle for single pulse SYSREF.

    I believe, you are making SYNC_1SHOT_EN bit to 0, when generating the pulses.

    Thanks!

    Regards,

    Ajeet Pal

  • 0 in reply to Ajeet Pal
    Prodigy 30 points

    04832.txt
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    0x000090
    0x000010
    0x000200
    0x010002
    0x01010A
    0x0102F0
    0x010350
    0x010410
    0x010500
    0x010601
    0x010700
    0x010802
    0x01090A
    0x010A60
    0x010B40
    0x010C20
    0x010D20
    0x010E01
    0x010F55
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    Hi Ajeet,

    Thank you for your reply. However, the last configuration of 0x143 is 0x014352. The 6th bit of 0x143 is 1. Here is my configuration on my board sent by controller. 

     Especially, plz pay attention to those configuration after 0x055500, which is quite similar on my board with LMK04821. those code is to initialize SYSREF according to datasheet.

    Regards,

    Shi Zhang

  • 0 in reply to Shi Zhang
    TI__Genius 12560 points

    Hi Shi,

    I don't see any issue in the sequence for SYSRF pulse generating, except you are sending appropriate SYNC rising edge at SYNC pin, as you have configured SYNC_MODE as SYNC PIN (Pulser). Please verify the external SYNC input signal.

    You could also try with SYNC SPI (Pulser) by changing SYNC_MODE --> 3 and 0x13E --> 03 for 8 pulses out.

    Thanks!

    Regards,

    Ajeet Pal