LMK05028: 1PPS validation & output DPLL locking issues

Hi Steven,

This will take me at least until next week to test in lab. Let's focus on getting the reference to validate first. If the reference never validates, then the DPLL will never lock.

Please first identify which detector is causing the validation to fail. There are the Early Detector, Missing Clock Detector, Frequency Detector, and Validation Timer. Try disabling the reference validations one-by-one and check at one point the REFxVALSTAT becomes 1. The point is to identify which detector is failing.

For example, disable Runt Pulse, check status. If REFxVALSTAT becomes 1, then this is the failing detector. If not, continue disabling the others such as Missing Clock and check status again.

More detailed steps:

1. Clear REF0_EARLY_DET_EN, R192[5] = 0.
   1. Read REF3VALSTAT, R742[7]. If still 0, go to next step. If it becomes 1, this is the problematic detector. Enable the detector again and try increasing the threshold until the validation stat reads 1.
2. Clear REF3_MISSCLK_EN, R192[1] = 0.
   1. Read REF3VALSTAT, R742[7]. If it becomes 1, this is the problematic detector. Enable the detector again and try increasing the threshold until the validation stat reads 1.
3. Clear REF3_PPM_EN, R192[2], R192[2] = 0.
   1. Read REF3VALSTAT, R742[7]. If it becomes 1, this is the problematic detector. Enable the detector again and try increasing the threshold until the validation stat reads 1.
4. Clear REF3_VALTMR_EN, R192[3] = 0
   1. Read REF3VALSTAT, R742[7]. If it becomes 1, this is the problematic detector. Enable the detector again and try increasing the threshold until the validation stat reads 1.
5. Summarized steps (based on bullets a – e):
   1. Write R192[5] = 0.
   2. Read R742[7].
   3. Write R192[1] = 0.
   4. Read R742[7].
   5. Write R192[2] = 0.
   6. Read R742[7].
   7. Write R192[3] = 0.
   8. Read R742[7].

Regards,

Jennifer

Hi Jennifer,

Reference validation seems to lose validation when REF0_PH_VALID_EN is enabled, which i believe does need to be enabled for 1PPS inputs. Ive enable the jitter counter to its max value of 63 and it is still unstable. Ive also read on similar topics for this part that it has locking problems with 1PPS pulses and other parts are recommended for use with 1PPS references, is this true?

Hi Steven,

Thanks for testing. REF0_PH_VALID_EN is needed for 1-PPS. What is the accuracy (ppm) of your XO/TCXO input? 

If XO exceeds required accuracy, then the 1-PPS reference may not be detected.

• Equation:
  • XO accuracy [ppm] = REF0_PH_VALID_EN / XO frequency [MHz]
• Example 1:
  • XO = 40 MHz
  • Set PRIREF_PH_VALID_THR  = 63 to maximize the XO accuracy range
  • Required XO accuracy = ± 1.575 ppm
• Example 2:
  • XO = 12.8 MHz
  • Set PRIREF_PH_VALID_THR  = 63 to maximize the XO accuracy range
  • Required XO accuracy = ± 4.92 ppm
  • We recommend 12.8 MHz XO input.

We do recommend our newer parts: LMK05318B/LMK5B12204 or LMK5B33216/LMK5B33414.

Regards,

Jennifer

Hi Jennifer,

Thanks for the feedback,

My XO input is TXC: 8W48070002 [48.0048MHz, +/-20PPM (Same as the evaluation kit)]

My TXCO is FOX electronics: FT3HNBPK10.0-T1 [10MHz, +/- 0.3PPM]

Is the input validation performed using XO or TXCO input?

Thanks

Steve

Hi Steven,

I suspect the XO ppm could be affecting it. Could you please try with TCXO + APLL mode (two stage) instead of XO + TCXO + APLL (three stage)? Let's see if this helps validate the 1-PPS.

Regards,

Jennifer