Team,
Currently my customer finds one CDCV304 output abnormal signal glitch issue, issue seen on 8 boards. I want to check with you about some points. Could you please help with it? Thanks!
The customer SCH is as below:
CPU outputs MDIO Clock signal (MDC)to CDCV304, frequency is 1MHz. We find that the CDCV304 output signal has some glitch which caused the CPU can't communicate with the PHY devices.
The MDC abnormal signal plot is as below, yellow line is TP2(CDCV304 input) signal, there is a small glitch at rising edge; purple line is TP3(CDCV304 output) signal, there is big glitch at rising edge. Seems that the signal glitch is amplified by the CDCV304.
And TP1 glitch is as below:
When doing the signal plot test, we find some clues:
1. When using the oscilloscope probe with big cap load probing at TP3, the glitch disappears. Remove this probe, the glitch comes back.
2. When using the oscilloscope probe with small cap load probing at TP3, the glitch is still there.
3. When using the oscilloscope probe with small cap load probing at TP3, using the oscilloscope probe with big cap load probing at CDCV304 other channels, the glitch disappears. Remove the big cap probe, the glitch comes back.
Based on the observations, I want to check with you about two points:
1. The TP2 glitch isn't big and TP3 glitch is big. Is there theory that can explain this observation?
2. Based on test 3, seems that the CDCV304 channels are not isolated to each other. Is there a internal diagram that can explain this?
Thank you very much for your support!
Best Regards,
Qiang
