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LMK04832: LMK04828 migrate to LMK04832 setting configuration

Ryan Lee TW
Intellectual 666 points
Part Number: LMK04832
Other Parts Discussed in Thread: LMK04828, , LMX2820, LMX2820EVM

Tool/software:

Hi expert,

My customer wants to migrate the configuration and settings from LMK04828 to LMK04832, it seems they are pin-to-pin compatible.

Below is their setting of version at LMK04828.

Could I just import the setting to LMK04832 directly?

Are there anything need to notice about?

0x000090, 0x000010, 0x000200, 0x000306, 0x0004D0, 0x00055B,
0x000600, 0x000C51, 0x000D04, 0x01000A, 0x010155, 0x010255,
0x010300, 0x010422, 0x010500, 0x0106F1, 0x010711, 0x01080A,
0x010955, 0x010A55, 0x010B00, 0x010C22, 0x010D00, 0x010EF1,
0x010F10, 0x01100A, 0x011155, 0x011255, 0x011300, 0x011422,
0x011500, 0x0116F1, 0x011711, 0x01180A, 0x011955, 0x011A55,
0x011B00, 0x011C22, 0x011D00, 0x011EF1, 0x011F10, 0x012014,
0x012155, 0x012255, 0x012300, 0x012422, 0x012500, 0x0126F1,
0x012770, 0x01280A, 0x012955, 0x012A55, 0x012B00, 0x012C22,
0x012D00, 0x012EF1, 0x012F00, 0x01300A, 0x013155, 0x013255,
0x013300, 0x013422, 0x013500, 0x0136F1, 0x013700, 0x013800,
0x013900, 0x013A01, 0x013B40, 0x013C00, 0x013D01, 0x013E03,
0x013F02, 0x01400F, 0x014100, 0x014200, 0x014311, 0x014400,
0x01457F, 0x01463B, 0x01471A, 0x014806, 0x014946, 0x014A06,
0x014B16, 0x014C00, 0x014D00, 0x014EC0, 0x014F7F, 0x015003,
0x015102, 0x015200, 0x015300, 0x015408, 0x015500, 0x015608,
0x015700, 0x01587D, 0x015900, 0x015A80, 0x015BD1, 0x015C20,
0x015D00, 0x015E00, 0x015F3E, 0x016000, 0x016119, 0x016244,
0x016300, 0x016400, 0x0165A0, 0x0171AA, 0x017202, 0x017C15,
0x017D33, 0x016600, 0x016700, 0x0168C0, 0x016959, 0x016A20,
0x016B00, 0x016C00, 0x016D00, 0x016E1B, 0x017300, 0x1FFD00,
0x1FFE00, 0x1FFF53,

  • 0
    TI__Genius 9190 points

    Hi Ryan,

    Would you be able to share the .tcs configuration file? Or the entire hex file? Most of the settings will be imported automatically if you load the 4828 config into the 4832, but the 4832 features more functionality in the clock distribution subsystem, so some settings will be imported incorrectly. I would be more than happy to help if you can provide the entire configuration. 

    Thanks,

    Michael

  • 0 in reply to Michael Srinivasan
    Intellectual 666 points

    Hi Michael,

    They don't have .tcs file.

    The configuration as below:

    CLKIN0 : 10MHz
    OSCIN : 100MHz
    CLKout4 & CLKout6 : 184.32MHz, LVPECL (2 Vpp)
    CLKout8 & CLKout10 : 100MHz, LVDS
    CLKout12 : 100MHz, LVPECL (2 Vpp)
    CLKout3 : 100MHz, LVPECL (2 Vpp)
    CLKout7 : 10MHz, LVPECL (2 Vpp)
    CLKout13 : 10MHz, LVPECL (2 Vpp)

    And they need to use 4-wire SPI setting, will use CLKin_SEL0 as SDO pin.

    The main problem now is that the SPI communication is not work.

    Thanks.

  • 0 in reply to Ryan Lee TW
    TI__Genius 9190 points

    Hi Ryan,

    Could you share the entire register map (all of the register values) with me? There are a couple missing from what you shared. Additionally, what is the frequency of the external VCXO they will be using?

    Furthermore, has the customer appropriately configured the CLKin_SEL0 as an SPI Readback pin? That would be the only way to set up the device for 4-wire SPI, where the additional pin serves as the MISO pin. 

    Thanks,

    Michael

  • 0 in reply to Michael Srinivasan
    Intellectual 666 points

    Hi Michael,

    The SPI issue had been solved.

    Now, the customer has another question. 

    They tried to setting the configuration of LMK04832 and LMX2820 at XRF8 Gen3 SOM made by AVNET.

    I have tested the settings using the LMX2820EVM and there is no problem.

    However, when work with the LMK04832, DAC has no output. Can you help me check if there is any problem with the settings?

    LMK input:

    LMK04832 default has 10MHz input to CLKin0 provided from external source, 100 MHz VCXO input to OSCin.

    LMK outputs:

    CLKout4 & CLKout6: 320MHz LVPECL 1.6Vpp (input to ADC at RFSOC)

    CLKout8 & CLKout10: 10MHz LVDS (input to OSCin at LMX2820A & LMX2820B)

    a. Is the lack of output from the DAC related to the SYSREF & SYNC settings?

    Please help us to verify the tcs file for our requirements and provide the suggestions.

    tcs file, block diagram and schematic as below:

    LMX2820_241021.tcsLMK04832_241021.tcs

    Clocks - 024000007A1_SCH.pdf

  • 0 in reply to Ryan Lee TW
    TI__Genius 9190 points

    Hi Ryan,

    I will get back to you soon.

    Thanks,

    Michael

  • 0 in reply to Michael Srinivasan
    Intellectual 666 points

    Hi Michael,

    Because this case has schedule pressure,
    So I look forward to your updates.

    Many thanks,

    Ryan

  • 0 in reply to Ryan Lee TW
    TI__Mastermind 29362 points

    Hi Ryan, 
    Just to make sure I understand - has Michael helped you achieve lock for the LMK0432? 

    Are both PLLs locked and the outputs stable? 
    If the answer to the above question is yes, and your DAC is not performing as expected please create a new post reaching out to the DAC team. 


    Best regards, 

    Vicente 

  • 0 in reply to vicente flores prado
    Intellectual 666 points

    Hi Vicente,

    Because the LEDs of Status_LD1 and Status_LD2 are hidden in the SOM module, they cannot be seen.
    Therefore, customer said that cannot be sure whether LMK has been locked, so they hopes that TI experts can help check whether there is a problem with the setting of the tcs file?

    Thanks.

  • 0 in reply to Ryan Lee TW
    TI__Genius 9190 points

    Hi Ryan,

    Sorry for the delay. I will get to your question tomorrow.

    Thanks,

    Michael

  • +1 in reply to Michael Srinivasan
    TI__Genius 9190 points

    Hi Ryan, 

    After taking your setup into lab I was able to find that both PLLs do, in fact, lock. However, I noticed that the outputs were incredibly dependent upon their terminations being correct. You may have to do some debugging to confirm my theory, but I believe that your CLKOUT4 and CLKOUT6 will not have any valid signal due to their terminations. They are LVPECL signals that require terminations to ground (and biasing, depending upon whether or not you choose to AC couple the output signal). Based on the following configuration:

    CLKIN0 : 10MHz
    OSCIN : 100MHz
    CLKout4 & CLKout6 : 184.32MHz, LVPECL (2 Vpp)
    CLKout8 & CLKout10 : 100MHz, LVDS
    CLKout12 : 100MHz, LVPECL (2 Vpp)
    CLKout3 : 100MHz, LVPECL (2 Vpp)
    CLKout7 : 10MHz, LVPECL (2 Vpp)
    CLKout13 : 10MHz, LVPECL (2 Vpp)

    I would expect that you have valid signals from CLKOUT3, CLKOUT7, CLKOUT8, CLKOUT10, and CLKOUT12, but not from CLKOUT4, CLKOUT6, and CLKOUT13. 

    My recommendation would be to terminate CLKOUT4/6/13 similarly to the way you have terminated CLKOUT3/7/12, or configure their outputs for LVDS. 

    I have attached the config I used to confirm locks for both PLLs. Please let me know if you have any more questions.

    confirmed_lock_4832.tcs

    Thanks,

    Michael

  • 0 in reply to Michael Srinivasan
    Intellectual 666 points

    Hi Michael, 

    Sorry for reply lately. After testing your .tcs file, it is working for customer's board.

    Thank you.