Tool/software:
Hi Riley Nguyen Jennifer Bernal
We tried your project file attached here: 4024.LMK5B 1-PPS, 122.88 MHz XO, lock.tcs. Our PPS still does not Sync with our input. We are able to see the phase drift even after it has been more than 20 minutes since the input gets validated (0x0032 reads 0x03). Please assist us with the settings
Here are two more project files in which we tried synchronizing too
1. PPS with a larger loop bandwidth: 8Oct814pm.tcs
2. 10 MHz (both with and without ZDM): 8Oct10pm.tcs
We are able to see the 10 MHz outputs drift with respect to the input too. And PPS is not locking still. We are in a time crunch with our application and have been trying to make the DPLL of this IC lock to the input for a fortnight now. Please help us with some detailed debugging procedure and/or a project file that's verified to lock.
Best Regards
