LP-MSPM0G3507: lp-mspm0g3507

Ali Mousa

Part Number: LP-MSPM0G3507

Tool/software:

Hello I am measuring here a much less time it is maybe in a range of 4 cycles or less rather than 16 cycles for Q16 Format. Because I was not able to read the Bit 8 (1) (compute ongoing) MATHACL->STATUS plus through a single step after OP1 were loaded I already see the value in the register MATHACL->RES1.

/// calculating sample
MATHACL->CTL = MATHACL_CTL_FUNC_MPY32| /// multiplication operation with 32-bit result.
MATHACL_CTL_OPTYPE_SIGNED | /// the operand is unsigned
MATHACL_CTL_QVAL_Q16

MATHACL->OP2 = 0x00048000;

MATHACL->OP1 = 0x00078000;

sample = MATHACL->RES1;

best regards

Ali

10 months ago

0 Gary Gao 10 months ago

TI__Mastermind 39650 points

What' the sample value it is after you running the code above?

0 Ali Mousa 10 months ago in reply to Gary Gao

Intellectual 256 points

I let the code executed in the FLASH and the CPU is runing at 80 MHz with 2 wait state.

And I let the code to be excuted in the SRAM which is executed at 80 with 0 wait states and in both situation when debuging and doing an assembly step in and looking at the registers they get update at the same time

0 Gary Gao 10 months ago in reply to Ali Mousa

TI__Mastermind 39650 points

So your question here is the executed time is not correct? Or your result is not correct?

0 Ali Mousa 10 months ago in reply to Gary Gao

Intellectual 256 points

Hi Gao

The result is correct but the executed time is more less then 15 cycles that is mentioned in the reference manual

0 Gary Gao 10 months ago in reply to Ali Mousa

TI__Mastermind 39650 points

How do you measure the cycles?

0 Ali Mousa 10 months ago in reply to Gary Gao

Intellectual 256 points

I looked into the assembly code it was the STR and LDR and I looked into the Cortex-M0+ instructions and their cycle counts Cortex-M0+ Technical Reference Manual r0p1

+1 Gary Gao 10 months ago in reply to Ali Mousa

TI__Mastermind 39650 points

OK, you can try to do different numbers calculate to make the RES1 changes every time. For our MATHACL really need such cycles to do the calculate so it is better to add few nop delays before you read the reslults.

Clock & timing

Clock & timing forum

LP-MSPM0G3507: lp-mspm0g3507