This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Tool/software:
The datasheet for this PN references POR and "Resistance Reading" time (t_Rext). t_Rext is typically 100ms with a maximum of 120ms. I'm performing a worst case analysis based on timer accuracy and external delay resistors to better understand what range of time we'd expect out of the DRVn pin. Is there a minimum value for t_Rext? Can you all define t_POR? I need to know min/max time that it would take this device to start the timer.
Hi Eric,
The information I can find said t_Rext is consist of several processing time. POR time is actually included in this parameter.
t_Rext is not tested in production as it is defined as a non-critical specification. You can assume the min. value is greater than 75ms.
Thanks I'm using it in the below mode and did not see that note where t_Rext includes POR + resistance reading+ other processes. I've measured this delay physically on one of our PCBs and got 77.5ms. Assuming a 75ms minimum doesn't seem conservative enough when nominal room temp reading showed 2.5ms above that. I've created a circuit that utilizes this chip as the timing element, but essentially removes that startup time. It ANDs the VDD/trigger pin with the timer being not done, which is achieved through a flip flop. I may have to assume 0ms minimum startup to be conservative on my worst case analysis since this is providing a window for a safety event. We have to understand the minimum and maximum bounds if a data driven t_Rext (min) can't be provided. Was your value based on some data collected?