This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMK5B12212EVM: CH11

Part Number: LMK5B12212EVM
Other Parts Discussed in Thread: LMK5B12212

Tool/software:

Hi Team, 

My customer is evaluating LMK5B12212 EVM with 312.5MHz, they config TICS pro and can generate 312.5MHz clock output. however\, customer got some questions. 

1, Config TICS-Pro and program the configuration through TICS-pro, but power cycle EVM still need reprogram?

 

2. Ch0  ~ Ch11 are set to 312.5MHz, but Ch1 and CH11 swing level are different. 

Attached is customer TCS file, can you help to review customer setting?

LMK5B12212.tcs

Thanks & Regards

Eddie Chou

  • Eddie,

    Our expert for this device is currently out of office, and will return tomorrow. Please expect a response by then.

    Thanks,

    Kadeem

  • Hi Eddie, 

    To boot from an EEPROM image, the "Enable EEPROM Overlay on POR" box needs to be checked on the EEPROM programming page in TICS Pro. Otherwise, the device will boot from a ROM image and will not load values from the EEPROM. Let me know if this helps. 

    Regards, 

    Connor 

  • Hi Connor, 

    Thanks for your feedback, may I know the second question from customer?

    Can you help review customer tcs file? the Vcm is around 0.1~ 0.2V with LVDS output, 

    Customer need to confirm the signal level with FPGA. 

    Thanks & Regards

    Eddie

  • Hi Eddie, 

    I don't see any obvious issues with the tcs file. Can you confirm that they are measuring with the same style of cables/probes for OUT0 and OUT11? I would guess that this is a measurement setup issue rather than a problem with the register configuration. 

    Regards, 

    Connor 

  • Hi Connor, 

    We find the Vcm issue is dye to HW configuration difference by channels in EVM design. 

    However, customer still not able to program EEPORM by check enable EEPROM overlay on POR and PDN , but still no output after power up device. 

    Additional question is customer want to use SYSREF to synchronized multiple LMK5B12212, customer would like to confirm what input pin can use for SYSREF?

    Thanks & Regards

    Eddie 

  • Hi Eddie,

    1. Is there an external XO input being provided? I see the .tcs setting has 60 MHz as the XO input. The on-board TCXO is 48 MHz. They will need to disable the on-board TCXO through the jumper setting then supply an external 60 MHz input through the SMA connector.
      1. Please confirm if they have done this. Otherwise, outputs will not show because the APLL cannot lock.
    2. Can you provide more detail on the SYSREF input? Is this a single pulse or a continuous waveform? What frequency?

    Regards,

    Jennifer

  • Hi Jennifer, 

    Customer actually use 48Mhz for XO input not 60MHz.  how to confirm the EEPROM program is succussed? 

    additional question from customer is if they enable GPIO1 as SYNC pin, will GPIO input :High" level signal reset LMK5B12212 clock output?

    Thanks & Regards

    Eddie

  • Hi Eddie,

    #1

    Then the tcs provided is not correct because XO input and APLL register settings are configured for 60 MHz input.

    I have updated the new config to 48 MHz XO input:

    e2e_LMK5B12212_XO=48MHz_OUT=312.5M_2025-06-25.tcs

    #2

    Also, can you elaborate how you are probing? Is it by Hi-Z single-ended? Differential probe?

    #3

    I see the output format is set to LVDS. Make sure to terminate the outputs properly by either 100 ohm differential if DC-coupling the outputs or 50 ohm to GND on each P and N leg if AC-coupling.

    Regards,

    Jennifer