LSF0101: IBIS model issue LSF0101

Vidhya J

Part Number: LSF0101
Other Parts Discussed in Thread: LSF-EVM

Output voltage of pin B1 and B2 are not changing to 3.3V. Default gets assigned to LSF0101_IO_5S but the voltages in Hyperlynx simulation is observed as 1.8V. When tried to edit model, it is not getting changed.

Kindly suggest.

4 months ago

0 Jack Guan 4 months ago

TI__Guru 60891 points

Hello,

External pullups are needed at the outputs, could you please check/ retest with them populated at the outputs to achieve the 5V logic high state?

Regards,
Jack

0 Vidhya J 4 months ago in reply to Jack Guan

Intellectual 440 points

Hi Jack,

In my design , VrefA is 1.8V and VrefB is 3.3V.

There are 3.3V pup on Pins 5 and 6. but still in simulation, output voltage levels are at 1.8V instead of 3.3V. please clarify if some settings to be changed in IBIS model?

Thanks and Regards,

Vidhya

0 Vidhya J 4 months ago in reply to Vidhya J

Intellectual 440 points

REfer to the snap below.

0 Jack Guan 4 months ago in reply to Vidhya J

TI__Guru 60891 points

Hi Vidhya,

Can you provide the full sim schematic? Note that the model selected for the sim should reference to the same voltage that you are expecting to simulate the output at. In this case, the 3V3 model should be used.

e2e.ti.com/.../faq-which-ibis-model-should-i-choose-for-simulating-auto-bidirectional-translators-lsf-txb-txs

Regards,

Jack

0 Vidhya J 4 months ago in reply to Jack Guan

Intellectual 440 points

HI Jack,

As shown in the image, default LSF0101_IO_50A_S is considered as default. how to change this to 1.8V (VrefA) and 3.3V (VrefB)?

Thanks,

Vidhya

0 Jack Guan 4 months ago in reply to Vidhya J

TI__Guru 60891 points

Hi Vidhya,

Since you are looking to simulate the output behavior of the device at 3.3V, it is recommended to use the 3.3V model, with both the inputs and outputs biased to 3.3V. Currently in your image, the input is configured to 1.8V. This is not sufficient enough to provide the output characteristics of 3.3V output. This must be done because the LSF is a passive translator with no buffering circuitry, so the simulation setup is a bit different compared to other buffered devices.

Thanks,

Jack

0 Vidhya J 4 months ago in reply to Jack Guan

Intellectual 440 points

HI Jack,

Do you mean input and output both to be set to 3.3V models just for simulation?

Also, refer to the snap below. Model is set to 50A_S. But from simulation, both A1 and B1 are at 1.8V level. Please clarify.

Thanks and Regards,

Vidhya

0 Jack Guan 4 months ago in reply to Vidhya J

TI__Guru 60891 points

Vidhya,

Vidhya J said:
Do you mean input and output both to be set to 3.3V models just for simulation?

Yes that is correct.

Vidhya J said:
Also, refer to the snap below. Model is set to 50A_S. But from simulation, both A1 and B1 are at 1.8V level. Please clarify.

The input should be 3.3V signal into the 3V3_S model. The output should be externally pulled up to 3.3V to observe the waveform ch.

Regards,

Jack

0 Vidhya J 4 months ago in reply to Jack Guan

Intellectual 440 points

Thanks, Jack, for the clarification.

It is a limitation that model doesn't support to see Level translation 1.8V to 3.3V in simulation.

Regards,

Vidhya

+1 Jack Guan 4 months ago in reply to Vidhya J

TI__Guru 60891 points

Vidhya,

I understand your frustration on this one. Since LSF-type translators are switch based level shifters with no buffering components, it is difficult to have it accurately represented in an I/O Buffer Info Specification Modeling (IBIS). We generally suggest customers to use the LSF-EVM instead for evaluation of the device.

Regards,

Jack

0 Vidhya J 4 months ago in reply to Jack Guan

Intellectual 440 points

Thanks Jack for the clarfication.

Regards,

Vidhya

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LSF0101: IBIS model issue LSF0101