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Original question:

CDCE6214-Q1: CDCE6214

CDCE6214: CDCE6214 Use cases - fall back mode support as production operating mode?

Matthew Hardeman
Prodigy 20 points

Part Number: CDCE6214

I have an applications question specific to the CDCE6214.  Having reviewed the datasheet, the best guaranteed way to access the I2C interface appears to be to start the device in fallback mode and then proceed with register programming as desired.  Presumably I could also do direct EEPROM reads to find any stored trim data and apply those values to appropriate registers.

If I would like my product to not require any pre-provisioning of settings to the EEPROM, is it acceptable to just always boot the CDCE6214 in fall back mode, query eeprom if necessary or appropriate to retrieve factory trims, program the registers for the running configuration, set recalibrate and await PLL lock?

This would seem to avoid scenarios where I have to depend on Page 1 initial settings supporting I2C communication and can avoid having to worry about pre-provisioning the chip or worry about first-boot EEPROM provisioning, etc.

My question is whether or not this is a supportable configuration and whether there are any caveats / concerns.

Thanks!

  • 0
    TI__Expert 4930 points

    Hi Matthew, 

    Operating the device in fall-back mode bypasses the EEPROM Read at power up, resulting in the device booting in default mode. In this mode you will not have access to the EEPROM, but you will be able to start with a predictable configuration and program the registers for the current configuration. Based on what you're looking to achieve, I believe this is the best course of action since there's no dependency on the EEPROM settings supporting the I2C communication. Keep in mind that in this mode, REFSEL and HW_SW_CTRL both need to be mid-level/high-Z, and the I2C target address is 0x67 as opposed to the default 0x68.  

    Best,
    Jaryd

  • 0 in reply to Jaryd Dukes
    Prodigy 20 points

    Hi Jaryd,

    I have a couple of follow-on questions for this:

    1.  What precisely do we mean by "will not have access to the EEPROM".  Is it (A): "The IC will not load the EEPROM values into the registers at power-on-reset, but you can still use I2C to perform explicit direct-access EEPROM reads" or is it (B): "There is no mechanism in this mode for you to retrieve any information from the EEPROM."

    2.  Do i correctly understand that the part ships from the factory with some tuned trimming parameters?  If so, which registers / EEPROM addresses are those values stored in?  Datasheet table 5.18, note 3.

    3.  There seems to be conflicting documentation on the matter of REFSEL _and_ HW_SW_CTRL needing to be floating.  I believe the datasheet says that only one or the other need float in order to enable fallback mode, per table 7-18.