Hello, I am planning to add a second port to an existing drive of a TFT display panel. To drive two twin displays I plan a signal splitter circuit described by the attached schematic.
My question is, do I use 100-ohm terminations at the LVDS inputs (the clock rates are 33.3MHz or less)? The part is CDCLVD2102.
For the LVCMOS 1:2 buffer outputs I plan to use 5-ohm series terminations, the part is CDCLVC1102. Is there anything else I forgot?
Regards, Jim Gabel
Schematic
