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CDCM6208V2EVM: VCO Calibration using RSTN bit

Part Number: CDCM6208V2EVM

Hi all,

I am using the CDCM6208V2 EVM and have a microcontroller to interface with it using SPI.

I am using RSTN bit in register 3 (register 3, bit 6 = Reg3.6) to initiate VCO calibration

- the code successfully toggle the bit (set 0 then 1) and the "PLL LOCK" LED shows the correct status of the PLL

Two Issues:

1-

-When I read Register 21 less than 30 ms after toggling Reg3.6, the PLL_UNLOCK bit (Reg21.2) shows 1 (UNLOCKED) while the LED is showing LOCK

-if I read Reg21 more than 30 ms, Reg21.2 show 0 (LOCKED) which is correct

-Is there a minimum time we have to wait after toggling the RSTN bit in SW????

2-

-if the Ref clock is not connected, reading Register 21 returns random values instead of 6 = 0110 = PLL_UNLOCKED, Loss of Reference Input

Any feedback is appreciated!

Regards,

Murad

  • Any one can help!?!?
  • Hello,

    I've notified an engineer to respond.

    73,
    Timothy
  • Hi Murad,

    - PLL lock time depends on the PLL-PFD clock & PLL loop bandwidth. It can range upto 16 sec. Please refer to Device power up Timing section of the datasheet.

    - For LOS_REF to operate properly, the secondary input SEC_IN must be enabled. Have you enabled the secondary reference input also?

      The clock in your case is not connected at all or you disconnect it after powerup?

    Regards

    Puneet

  • Thank you Puneet

    -I only have a valid clock at the PRI input, the sec has no input...when PRI is connected, the system LOCK (LED) but reading the bit doesn't reflect the PLL lock unless if I read it after 30 ms after toggling (see above please)

    -for the second question above, the clock is not connected at all


     
    Regards,

    Murad