LMX2581: How to step the frequency easily in 0-DELAY mode with TICS-Pro

The software I am using is not Codeloader as I have shown in the setup above

It's TICS-Pro version 1.6.5.0 Build date 16 Aug 17. Part version 2016-03-23.

Thanks Dean, I will try stepping it by under 1MHz steps and setting FCAL_EN=0 steps and see if that works,

Northley,
OK. Sounds good. Just to clarify, you should be able to do 1 MHz steps, but you can't deviate too far from the frequency that you calibrated at.
Regards,
Dean

Hey Dean,
I have been experimenting with stepping the frequency in 0-Delay mode in 1MHz steps as you mentioned above and with frequency calibration off (I assume FCAL_EN=0 is the same as NO_FCAL=1) . I have it set at 600MHz with a divider of 4 (so VCO frequency of 2400MHz) and 50MHz PFD frequency. It manages to step accurately from 600-603MHz and then it seems to hit its limit. This is only a small part of a PFD cycle of 50MHz.

This means i can only set the frequency in 0-Delay mode to each integer boundary frequency with 3MHz above that (ie 600-603MHz, 650-653MHz etc). We were hoping to be able to use the whole 50MHz cycle in fractional mode and 0-Delay mode.

Is there any way I can use the PLL in 0-Delay mode over the whole PFD (50MHz in this case) cycle? Is there any way to recalibrate while you are in 0-Delay mode?

Many Thanks,
Helen

Helen,
What you are seeing is expected. You lock the PLL and you move the frequency, but when the VCO frequency gets about more than 12 MHz from where it calibrates, it needs to re-calibrate. The LMX2581 divides the entire frequency range into 4 cores with 256 different frequency bands, so this would be the boundary of that frequency band.

Calibration would be necessary if you want to move your output by 50 MHz (That's 200 MHz at the VCO frequency). Unfortnuately, the only way to recalibrate is to switch back to normal mode (non 0-delay) and switch it back to 0 delay mode.

There is a way to force a particular VCO core and Capcode and then force this value to bypass the calibration by using VCO_CAPCODE_MAN, but these settings would change for every part and every temperature.

Regards,
Dean

Hello Dean,
Thanks for your reply,
Just to clarify, please let me know if I haven't understood fully;

It looks like it wouldn't be possible to use the whole PFD cycle in 0-Delay mode without forcing a particular VCO core and capcode as mentioned in the last paragraph above. Which would mean an un-calibrated and hence inaccurate output frequency.

From the steps needed to set the PLL to 0-Delay mode, in step 1 you need N to be divisible by the divider. This means that you can only change to 0-Delay mode at each integer boundary. Supposing I needed 620MHz output which is 20MHz away from the integer boundary. To go back to normal mode then back to 0-Delay mode i could only set to 600 or 650MHz, but not 620MHz. 620MHz would require the N value to be non divisible by the divider value. And hence there would be no way of setting it to 620MHz in 0-Delay mode except by the forcing VCO core and Capcode you mentioned above. But it appears it would not be calibrated and hence not accurate in frequency.

It appears this particular chip may not be able to do what we want but i'm interested to see if you have others that will.
What we need is:

Fpfd=50MHz (no divider used in the reference path)
Fvco=2200-3000MHz
Fout=550-750MHz
Divider=4 (inside the loop)

Would you suggest anything else?
Many thanks for your help,
Helen

Helen,

With the LMX2581, you can 0-Delay mode, but it is more limited.

You might want to consider the LMX2594 that has a true 0-delay mode that you can step easily likely you want.

Also, consider the LMX2572, which is a lower frequency version of the LMX2594.  The LMX2572 is not released, but will be this year and the datasheet is on the web.

Regards,

Dean