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LMK03328: Unable to get outputs to drive after programming EEPROM

Part Number: LMK03328

Hello team

I am having trouble getting my LMK03328 to put out the clocks on its outputs. I am able to program the device from the default mode and obtain the desired outputs after the first programming of the registers, but after I committed these same registers to EEPROM, the outputs no longer appear and I am unable to get the outputs to enable again. In other words, I cannot even get a new register write to output the clocks even though those same register writes successfully worked before. I can see that the EEPROM programming is successful by checking the programming counter register. Does anyone have any idea where to start debugging this?

Kind regards,

Stuart Smith

  • Hello again

    My register file attached:

    R0	0x0010
    R1	0x010B
    R2	0x0232
    R3	0x0300
    R4	0x0400
    R5	0x0500
    R6	0x0600
    R7	0x0700
    R8	0x0800
    R9	0x0900
    R10	0x0AA8
    R11	0x0B00
    R12	0x0CDF
    R13	0x0D00
    R14	0x0E00
    R15	0x0F00
    R16	0x1000
    R17	0x1100
    R18	0x1200
    R19	0x1300
    R20	0x1455
    R21	0x1555
    R22	0x1600
    R23	0x1700
    R24	0x1800
    R25	0x19F5
    R26	0x1A00
    R27	0x1B28
    R28	0x1C50
    R29	0x1D00
    R30	0x1E00
    R31	0x1F7C
    R32	0x2078
    R33	0x211F
    R34	0x2232
    R35	0x2378
    R36	0x2407
    R37	0x253C
    R38	0x2631
    R39	0x27FC
    R40	0x2800
    R41	0x297C
    R42	0x2A13
    R43	0x2B7C
    R44	0x2C13
    R45	0x2DAC
    R46	0x2E3B
    R47	0x2F3B
    R48	0x30FF
    R49	0x3100
    R50	0x320A
    R51	0x3303
    R52	0x3400
    R53	0x3500
    R54	0x3600
    R55	0x3703
    R56	0x3816
    R57	0x3918
    R58	0x3A00
    R59	0x3B96
    R60	0x3C00
    R61	0x3D00
    R62	0x3E00
    R63	0x3F00
    R64	0x4000
    R65	0x4101
    R66	0x420C
    R67	0x432F
    R68	0x4401
    R69	0x4578
    R70	0x4607
    R71	0x4702
    R72	0x4818
    R73	0x4902
    R74	0x4A71
    R75	0x4B00
    R76	0x4C00
    R77	0x4D00
    R78	0x4E00
    R79	0x4F00
    R80	0x5001
    R81	0x510C
    R82	0x5220
    R83	0x5300
    R84	0x5478
    R85	0x5500
    R86	0x5634
    R87	0x5700
    R88	0x5800
    R89	0x59DE
    R90	0x5A01
    R91	0x5B18
    R92	0x5C01
    R93	0x5D4B
    R94	0x5E01
    R95	0x5F86
    R96	0x6001
    R97	0x61BE
    R98	0x6201
    R99	0x63FE
    R100	0x6402
    R101	0x6547
    R102	0x6602
    R103	0x679E
    R104	0x6803
    R105	0x69FF
    R106	0x6A05
    R107	0x6B0F
    R108	0x6C0F
    R109	0x6D0F
    R110	0x6E0F
    R111	0x6F00
    R112	0x7000
    R113	0x7100
    R114	0x7200
    R115	0x7308
    R116	0x7419
    R117	0x7500
    R118	0x7603
    R119	0x7705
    R120	0x7800
    R121	0x790F
    R122	0x7A0F
    R123	0x7B0F
    R124	0x7C0F
    R125	0x7D00
    R126	0x7E00
    R127	0x7F00
    R128	0x8000
    R129	0x8108
    R130	0x8219
    R131	0x8300
    R132	0x8403
    R133	0x8505
    R134	0x8600
    R135	0x8700
    R136	0x8800
    R137	0x8930
    R138	0x8A00
    R139	0x8B00
    R140	0x8C00
    R141	0x8D00
    R142	0x8E00
    R143	0x8F00
    R144	0x9000
    R145	0x9100
    R169	0xA940
    R172	0xAC24
    R173	0xAD00
    
     Kind regards,

    Stuart Smith

  • Hi Stuart,

    Are you using the LMK03328EVM and TICS Pro? What are the input frequencies?

    What procedure did you follow to write the EEPROM? There are two methods outlined in the datasheet to write to SRAM: Register commit method and direct SRAM access.

    Which EEPROM page are you writing to? If the EEPROM programming is successful, configure GPIO[3:2] to initialize from the desired page and initiate a power cycle.

    One way to determine whether an EEPROM write was successful is to readback of R137.5. From datasheet page 57: "If an EEPROM write is unsuccessful, a readback of R137.5 will result in a 1." See section 10.5.5 for more info

    Kind regards,
    Lane
  • Hi Lane

    Thank you for your reply.

    I am using my own design, not the EVM. The input frequencies are both 16MHz. 

    I used the register commit method to write to the EEPROM.

    I am writing to page 0 of the EEPROM and the device always loads from page 0 on power up (GPIO[3:2] = 00]. I have confirmed that the correct register values are loaded after a startup by reading them back from the LMK03328. The EEPROM write is always successful.

    Upon further investigation, using the LOL ouptputs from the STATUS pins, it seems that the PLL is not locking when loading the registers from the EEPROM. Note, however, if I let the default EEPROM entries load at startup and then alter the register values via I2C to my setup, I can see the correct outputs. However, if I write that same data to the EEPROM, the PLL cannot lock. Could there be any reason for this?

    Regards,

    Stuart

  • Hi again Lane

    I have gone back and checked bit R137.5 after an EEPROM program routine. It seems that the bit is indeed asserted. Not only that, bit R137.0 is also asserted, which is strange as that bit should deassert automatically after an EEPROM program/erase cycle. Additionally, the EEPROM program register is incrementing every time I program the EEPROM. EDIT: I am using TICSPro now and I am not getting any CRC errors, however the behaviour remains unchanged: The VCOs appear not to be capable of locking.


    I find it strange that the EEPROM program is unsuccessful as I am able to read back all of the registers correctly after a power cycle. Before I program the EEPROM, I write 0xEA to the NVMUNLK register. The very next I2C write is the EEPROM commit command. I am not sure what could possibly be going wrong.

    Kind regards,
    Stuart

  • Hello Stuart,

    Thanks for the details, I'll take over for Lane.

    I have your frequency plan  from the other e2e you posted earlier.

    1. Could you try toggling the RESETN_SW bit after you load the registers from the EEPROM. (may help with the VCOs locking)
    2. Please send over your TICS-Pro file (TCS) so I can take a look at your setup (File -> Save)
    3. Are you using TICS-Pro to program the chip or exporting the raw registers and doing it over your i2c protocol?

    Thanks!

  • Hello Vibhu

    Thanks for the feedback once again.

    I found the issue, it appears that the reference detector was not set up correctly. I had to use slew rate detection as it did not seem to work with level detection. Thank you for the help.

    Regards,

    Stuart