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LMK04828: Support for the LMK04828

Shlomi Yehezkia
Mastermind 6150 points
Part Number: LMK04828

Hi Team,

I trying to work with the LMK04828 and get a problem.

First of all, I succeed to configure the LMK04828.

I have 1GHz at the output of the LMK04828.

PIN LD2, indicate that PLL2 is locked.

The problem is with PLL1. PLL1 isn't locked. The Reference input is from CLK0 or CLK1.

I apply to those input a 10MHz square wave.

Attached to this mail the register file & the LMK04828 Schematic. 

Thanks,

Shlomi

 

7115.QM_SCHEMATIC_Clock_Gen.pdf


 

  • 0
    TI__Mastermind 33730 points

    Hi Shlomi,

    I notice the VCXO for PLL1 is listed as a "CVHD-950-122.8" which is a bit unusual since I can't find any 122.8 MHz VCXOs in the CVHD-950 lineup. Are we sure it isn't 122.88 MHz instead? The pull range on a CVHD-950 VCXO is only ± 25 ppm/V, which corresponds to about ± 5 kHz centered at 1.65V. 122.88 - 122.8 = 80 kHz offset, which exceeds both the tuning range and the frequency pulling range. So it makes sense if this is a 122.88 MHz VCXO that the lock is failing, since the frequency would be off by about 1600 ppm.

    Regards,