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LMX2581: PLLatinum Sim optimize

Part Number: LMX2581
Other Parts Discussed in Thread: LMX2592, LMX2594, LMX2572

Please give advice on how to use PLLatinum Sim.

Isn't the Achieved value displayed in the Parameter of Filter Designer the value of "Total Phase Noise" of Phase Noise?
If not, what is the value of Achieved?
The value of "Total Phase Noise" seems to match the value on the graph.

If I want to optimize the phase noise of MKR1 to -100dBc/Hz or less, should I enter "-100" in "MAX Value"?
Then click Calculate Loop Filter. What does the Achieved value "-92" mean?

Currently, I cannot satisfy -100dBc/Hz.
It may be difficult in practice, but is there a way to set the optimization so that it is closer to that?
If you optimize with the photo settings, you will get characteristics you do not want at all.
The PLLatinum Sim setup data are manually adjusted loop filter constants.
(Is it better to make the final adjustment manually after the automatic adjustment?)

Regards,
Akihiko Yokouchi/

LMX2581_200722.zipPLLatinum Sim documentation.pdf

  • Hello Akihiko,

    In regards to your first question. The reason there is a discrepancy between the graph values and the "Achieved" values is because you have not recalculated the loop filter (which is indicated by the yellow "Calculate Loop Filter" button). When I load your design and click this button, all the values align as expected.

    In regards to your next question, the "Achieved" values is the actual phase noise value acquired through simulation. In order to satisfy the -100 dBc/Hz at marker 1, I recommend looking at the "LMX2581 Phase Noise Tips" under the Phase Noise Tab. By simply maximizing the charge pump gain (Kpd) to 3.1 mA, I was able to get the phase noise at MKR1 to -98.7 dBc/Hz. Note that in the PLLatinum Sim file you attatched, the phase noise at the lower offsets are completely dictated by the input oscillator phase noise and not the noise from the PLL.

    Hope this helps,

    Aidan

    LMX2581_200722(updated).zip

  • Hello. Dear Aidan,
    Thank you for your advice.

    The value of Achieved was exactly as you pointed out.

    Next,Please give us some advice regarding optimization.
    If optimization is performed with the contents of the file "LMX2581_Auto_adj_before", the result will be "LMX2581_Auto_adj_after".
    I don't think it will definitely reach the desired value, but is the result correct? (Is my setting correct?)
    Finally I decided the loop filter constant manually ("LMX2581_Auto_next_manual_adj")

    A certain amount of characteristics is secured by "PLLatinum Sim" optimization.
    After that, is it better to use it like a manual adjustment?

    I want to increase the CP current, but I want to suppress the spurious of 1560MHz(=120MHz*13), so the CP current is the smallest.
    At this time, I want to design the optimum loop filter constant.

    PLLatinum Sim DATA.zip

  • Hi Yokouchi-san,

    What is your target phase noise specification?

  • Hello. Dear Noel,

    Loop Bandwidth: About 100kHz, Phase Margin: 45deg or more, SNR: -44dBc/Hz (1k to 2MHz) or less is the design target.
    SNR is of particular importance, followed by Phsase Margin.
    In addition to that, I want to make RMS Jitter and spurious as small as possible.
    By the way, it is used for Local (1st LO) of 64QAM or 128QAM system(2nd LO:LMX2592 or LMX2594)

    The SNR did not automatically meet the design goals, probably because the optimization settings were poor.
    Therefore, a final manual adjustment was made.

    LMX2581, LMX2592, LMX2594 are designed by PLLatinum Sim.
    I'm always worried because the settings for this optimization are bad.
    The biggest problem is that I don't really understand PLL circuits, and PLLatinum Sim. (sorry)

    I would appreciate any advice on the optimization settings.

    Regards,
    Akihiko Yokouchi/1526.PLLatinum Sim DATA.zip

  • Hi Yokouchi-san,

    if your target is good jitter and SNR, I would recommend LMX2572, it has better PLL noise than LMX2581.

    Attached is the sim file. 

    Please note I was using the smallest charge pump current, jitter and SNR could be better with a higher charge pump current. I was also using a second order modulator to eliminate the 13.333MHz spur that would appear when using a third order modulator.

    https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/48/lmx2572_5F00_1570M.sim