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LMK01000: About Fclkin and divide

user5959213
Intellectual 865 points
Part Number: LMK01000

Hi all,

   From the datasheet,the relationship of them is as follow:

But when i test the LMK01000 DEMO,the Fclkin=1474.56M and the divider is set to 4,it also works.

So which one is correct?

  • 0
    TI__Mastermind 31080 points

    Hello user599213,

    The values and limits in the datasheet electrical characteristics are the only ratings which are guaranteed. It is possible that divider values greater than 2 could work with Fclkin > 1300MHz on some or even most devices, but operation is not guaranteed across all PVT operating conditions.

    Regards,

  • 0 in reply to Derek Payne
    Intellectual 865 points

    hi Derek,

      I have another question:pin 2/9/10/32 are NC pins in datasheet,but in the EVB user guide schematic,these pin are connected.If i remain NC in these pins in my schematic design,is there any problem?

    The differences between the datasheet and user guide are as follow:

    datasheet:

    lmk01000 EVB board user guide:

  • 0 in reply to user5959213
    TI__Mastermind 31080 points

    Hi user5959213,

    The LMK01000 die is used for other products which have more functions, so our evaluation board was likely designed to accommodate internal validation of these features as well. However, in the LMK01000 these pins are not connected to the die, and can be left floating or shorted to VDD/GND according to preference. You will not have any problem if you leave these pins NC on the LMK01000.

    Regards,

  • 0 in reply to Derek Payne
    Intellectual 865 points

    Hi Derek,

        I have some problem with the output when i debugged  LMK01000  on my board yesterday,so i checked the schematic to see if there is something wrong with my design.

    Finally, It turned out to be a timing problem.And it worked OK after a correct timing.

     Thank you very much.