LMK03200: Lmk03200output clk0-clk7 output issues

Hello ti expert 

  1： lmk03200 current control chip is controlled by st mcu, lmk03200 chip 2 pin fout has output 1.2288 ghz, in the lmk03200 output frequency range. According to the lmk03200 chip manual ,6.2.1 0 delay mode Reference configuration, in debugging clk0-clk1, with oscilloscope measurement, waveform changes, frequency changes, trouble analysis is what the reason? Current expected output mhz 30.72 The current schematic diagram of frequency calibration is also added to the debugging, lmk03200 the chip 34.35 feet are not connected nc, internal feedback is used, the lm03200 chip 27 feet are not connected, and the synchronous end is used 

2: the original chip driver code, please send a copy? 

Hello ti expert 

  lmk03200 the underlying driver code (written c language) sent    Thank you 

Hello ti expert 

Please use the TICS PRO software available in the below trainings. I will attach Step 1 and Step 2 separately. Please note that Register 0 needs to be programmed to RESET = 1 before loading in configuration of Step 1.

From the fout set to 1.2288GHz I can tell the Fvco (Voltage Controlled Oscillator frequency) is not set correctly. This should be 1.2GHz or 1200MHz.

LMK03200_ZDM_Step1_HexRegisterValues.txtLMK03200_ZDM_Step2_HexRegisterValues.txt

LMK03200 fout 1.2g have output, clkout5 according to your configuration The 30 mhz waveform beats fast, the parameter value changes unceasingly, is hundreds hz megabytes change  please  why; what's the reason

Hello ti expert

  1:General circuit

2:Branch

Could ti engineer see if there is a problem with the circuit diagram?

Hello ti expert:

  1:May I ask the next measurement clk0-clk7 output 30 mhz clock signal, can the filter be measured?

   2:May I clk0-clk7 the output clock frequency from the lmk03200 chip, can the output frequency be measured without a load? 

  3:Programming process 

LMK03200 数据手册6.2.1  0 delay mode 
SETP1:
GOE=0;
write Register(0x00000100) R0_INT
write Register(0x10000100) R0
write Register(0x00000101) R1
write Register(0x00000102) R2
write Register(0x00030A05) R5
write Register(0x00010106) R6
write Register(0x10000908) R8
write Register(0x0830010E) R14
write Register(0xC8003C0F) R15

void calibration() // calibration
{
u8 caflag1;
u8 caflag2;
u8 cafinsh;
write Register(0xC8003C0F) R15;
delay_ms(2);
if(R0&0X08000000)
{
;;;; Waiver, invalid
}
else //0_DELAY_MODE=0
{
caflag1=1;
}
if(caflag1==1)
{
caflag1=0;
if(R13&0x00028000) //osci valil
{
caflag2=1;

}else
{

;;;; Waiver, invalid

}

}

if(caflag2==1)
{
caflag2=0;
if(R7&0X06000000) //VCO_MUX =0
{
;;;;Waiver, invalid
}else
{

cafinsh=1;
}

}

if(cafinsh==1)
{
cafinsh=0;
if(LMK_LD==1) //Calibration completion lock
{
SETP2:
GOE=1;
write Register(0x10000100) R0
write Register(0xC8003C0F) R15
}

}
}

clkout5 of results F:30MHZ

1:Excuse me ti engineer, what's the problem