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Original question:

LMX2594: the lock problem and the spur of lmx2594

LMX2594: "sufficient time" between steps 1 and 2

cafain
Mastermind 6755 points
Part Number: LMX2594

Hi Staff

LMX2594 In the question "the lock problem and the spur of lmx2594", Noel-san answered as follows.

---------------------------------------------------------
3. the 10ms wait time is optional and it is intended to ensure
the internal LDOs have been settled down before doing another VCO calibration.
If you have sufficient time between Vcc power up and the first register write (between step 1 and 2),
you don't necessary need step 5 and 6.
---------------------------------------------------------
e2e.ti.com/.../3121660

As a condition that the operations of steps 5 and 6 are not required,
it is answered that it is possible if there is "sufficient time" between steps 1 and 2.
How long is this "sufficient time"?
I want to know the actual time.

best regard
cafain

  • 0
    TI__Genius 11900 points

    Hello Cafain,

    We do not have the exact time required between steps 1 and 2. It depends on the capacitors used on the Vbias pins. For the capacitors designed on the EVM we found that 10 ms is a safe amount of time with margin, however the actual bias voltages may be stable faster than 10 ms. The best way to determine how long to wait is to monitor and compare the bias voltages of the VBIAS / VREG pins (Table 41. Bias Levels of Pins) on your board and ensure they are all stable before step 6.

    Thanks,

    Vibhu