DAC8771: Is DAC data register changed to Zero or Mid scale when RANGE(3:0) is changed from a old setting to a new setting?

Kazuya-san,

When the RANGE[3:0] bits (bits 3:0 of the Configuration DAC Register) are set from one value to another value, it resets the DAC data register to the setting determined by the clear select value (CLSLA - bit 9 of the Select DAC register 0x03).

For example let's you have the RANGE set to 0 to +5V, and the CLSLA set to 0. If the range is then set to 0 to +10V, the DAC data register gets cleared to 0x0000 and the output returns to 0V. If the CLSLA is set to 1 and the RANGE changes, the DAC data register is reset 0x8000. In the same change in RANGE, the output is then set to +5V.

Joseph Wu