ADS1263: Application for bio-signal processing

Hi Bryan,

Many thanks for your response and excellent suggestions. The training material is also a very useful summary of what is required for bio-signal processing.

With my present design, simultaneity in ECG measurements should not be an issue, since at least 8 ADCs are be present in the system. This way, one (single ended or differential) channel on each ADC can be sampled concurrently. Typical microcontroller designs would cycle between ADCs (whether with concurrent channel sampling, or without), and the measurements would be serialized through the SPI bus transactions, such that no ideal parallelism is achievable in a multiple ADC microcontroller design. To alleviate this issue, I'm using FPGA hardware, in order to read each one ADC channel simultaneously, concatenate the readings and only then serializing them for the monitoring platform.

I'm using ADS1256 ADCs, concurrently sampling (say 1 channel per ADC) at their maximum throughput frequency. From the output of the logic analyzer, which is connected to the SPI bus and external signals of the ADC, it is noticeable that although the DRDY signals behave identically at the beginning of the sampling (just after the reset), they drift apart in some way or another, due to small variations in the DRDY cycle and perhaps SPI core transmitter/receiver-ready cycles - although I expect the latter to lave little to no influence, since the logic is driven at 50MHz and the ADC reading will be performed at rates between 546 to 4374 Hz (for single-ended configurations).

Indeed, this close to ideal concurrency can be achieved with the multiple ADCs in the system for ECG measurement, subject to DRDY cycle variations, etc. - the results will in theory be less precisely aligned when using multiple channels per ADC for an EEG setup, as a consequence of multiplexer cycling. Again, because of the FPGA implementation, in the EEG setup, though not each channel will be read simultaneously in this case, each one channel of each ADC will be read simultaneously (e.g. channels 0 for each ADC, then channels 1 for each ADC, etc.), so that there remains a good level of parallelism.

Since EEG signals reside in a low frequency band and the maximum sampling rate when using each channel on each ADC will provide 546 SPS in this configuration (well above the Nyquist frequency), and if my reasoning is correct, the loss in waveform precision is negligible. Though every data point of each channel will have a small time-offset relative to the previously read channel (for each of the 8 channels on each ADC), this effect will not be apparent in the resulting wave forms.

I have tested this configuration using a generated waveform with an amplitude 100uV and frequencies between 1-80Hz, which was then amplified by the in-amps currently present in the system and supplied to all channels in the system. The peaks are very well aligned, and the waves are sufficiently smooth for visual analysis to be conducted. The FFT plots also look very accurate when considering the power line 50Hz peak position and that of the generated signal.

If my above argument is somewhat close to correct, then the simultaneous sampling of the ADS129x channels will not constitute much of an advantage over the ADS1263, which will instead provide up to 32 bits of resolution (dependent on the chosen internal filter rate setting), as opposed to the 24 bits of the ADS129x. Indeed, the ADS129x series provides much of the circuitry necessary for bio-signal processing (lead off detection etc.), which is of great advantage, so depending on how much of a challenge and cost such implementations will impose, the ADS129x series could likely be the more reasonable choice.

Horia

Hi Horia,

I think you have your bases covered

If you are going to use multiple ADCs then this is effectively creating a simultaneous sampling system anyway. The challenge as you noted will be keeping the individual ADCs synchronized. You can always use the SYNC pin / command in the ADS1256 or the START pin / command in the ADS1262 in order to accomplish this. You will have some conversion delay as the digital filter needs to reset each time you request a new conversion (via START or SYNC), but this should be fairly consistent device to device. Just make sure the communication or GPIO traces are approximately the same length to each device.

I would compare the ADC noise at the specific data rate, gain, and filter setting (if applicable) between ADCs - this will tell you if you will actually get lower noise by moving from one ADC to another. Make sure you are using the input-referred noise tables, not the effective resolution / ENOB / NFB tables.

Let us know if you need any additional support. If you do have specific questions about the operation of the ADS1262, ADS1256 or ADS129x devices, please start a new thread and we will assist you there.

-Bryan