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ADS54J66: Noise Floor of ADS54J66

Part Number: ADS54J66

Hi

I am using ADS54J66 ADC in my application.

1.  I am operating ADC in Mode 2 (Decimation = 2).

     Clock to the ADC = 400 MHz.

     Now what is my Sampling Rate for each channel ??

     Is it 200 MHz or 400 MHz ? (Single we are decimating data by 2).

     What does fs corresponds to in the Datasheet ? -- Sampling Frequency ?

2. What is the noise floor for this ADC ?

    In the Datasheet , I found this

   

   Which Parameter in the Datasheet Corresponds to Noise Floor ?

   

  • Pavan,

    1. The ADC will be sampling at 400MHz and the ADC output data rate will be at 200MHz. Fs is the sample rate of the ADC.

    2. The noise floor is not shown in the data sheet. An example of what to expect for the noise floor using mode 2 sampling at 491.52MHz is attached.

    Regards,

    Jim

    Mode 2, ADC sample rate = 491.pptx

  • Hi Jim

    Since Sampling rate = 400 Mhz....ADC will capture Samples at 400 Mhz and it will drop 1 sample for every 2 Samples (As Decimation = 2).

    Right ?

  • Correct. 

  • Hi Jim

    Since ADC is 14 Bits. It can map values from -(2^13) to ((2^13)-1) ie...-8192 to 8191.

    Now I am plotting the data from JESD Rx IP in Matlab.

    Now I need to convert my digital values to voltage 

    I am using this formula

    Voltage Value = (Digital_Value * Peak_to_Peak ) /  (2^14) = (Digital_Value * 1.9) / 16384 

    Is this conversion correct ??

    ex :

    - 8192 : Voltage Value = (- 8192 * 1.9 ) / 16384 = - 0.95

    +8191 : Voltage Value = (+ 8191 * 1.9 ) / 16384 =  0.9498

    So Full Swing = 0.9498 + 0.95 = 1.899

    Is my understanding correct ??

  • This is correct. The range is 0.1159mV per count, which is another way of looking at this.

  • Hi Jim

    In the PPT, which you have shared for Mode 2.... What is the Input Voltage level ??  1.9V ??

  • Hi Jim,

    • I am feeding 60 MHz Sinosoidal Signal to ADS54J66 (Sampling Rate = 400 MSPS).
    • I am using ADS54J66 in Mode 2.
    • I have collected 64k Samples of data from JESD204B Rx IP in the FPGA.
    • Since Data is in 14 2's complement format. I have converted into decimal Format (Please find the attached decimal format file).

    60MHz_sine.txt

    • Now I have uploaded this data into HSDC Pro Software.

    • In my 60MHz_sine.txt file I have samples from -1500 to +1500 (not Exact Figure), but in the Time Domain representation (in HSDC pro Application), the Samples are around 8192 (2^14). So HSDC Pro is converting the data into OFFSET Binary and then it is plotting. But my ADC data is in 2's complement format. Not required to change into Offset Binary.
    • So in the HSDC Pro Application I am getting wrong Time domain Representation and Noise Floor is around - 90.
    • If I use my Custom Application, I am getting more Noise floor.
    • I think in the PPT which you have shared in the above queries, Noise Floor is -110 considering it as offset binary.
    • In the HSDC Pro GUI, How to remove this offset Binary Condition
  • Hi Jim,

    What is the relation between dB and dBFS ?

    dBFS -- Corresponds to Full Scale -- Which in our case is 1.9v right ?

    So what is the exact formula between dB and dBFS ?

  • Pavan,

    1.9V is full-scale and equals 0dB.

     The term dB FS (or dBFS) means decibels relative to full scale. It is used for amplitude levels in digital systems with a maximum available peak level, e.g., PCM encoding, where 0 dB FS is assigned to the maximum level.

    Regards,

    Jim

  • Hi Jim

    1.Is there any direct conversion formula from dB to dBFS ?

    2. Is there any settings required in the HSDC pro Software?

  • Paven,

    The results from the software can be displayed in either dBFs, dBc or Hertz. See sections 3.6.1.5 and 3.6 of the attached User's Guide for more info.

    Regards,

    Jim

    HSDC Pro user guide - latest version.pdf