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ADS1298: Leadoff detection throubles

Part Number: ADS1298
We are working with ADS1298 and we have some throubles with lead off detection. In another project we use all ADS1298 inputs and we have not problems with lead-off detection.
In this case we are using only two amplifiers of ADS1298, the other chanel inputs are connected to AVDD (same as note 1 at page 7 in datasheet).

The used circuit is the attached (circuit.png), Zin is the input analog filter, Rloff are the pull-up and pull-down selected resistors in ADS1298 configuration (all the other pull-up and pull-down resistors are not selected).

Just in case, the used configuration is:

    ADS_Stop_Read_Data_Cont();
    ADS_Write_register(ADS1298_CONFIG3_ADDR, VREFP_2 | PD_REFBUF_ON | RLD_BUF_ON | RLDREF_INT);  
    DelayMs(10); // no aclara cuanto esperar
    ADS_Write_register(ADS1298_CONFIG1_ADDR, HR_ON | DAISY_OFF | CLK_OFF | DATA_RATE_MOD512); // High resolution, 1000SPS
    ADS_Write_register(ADS1298_CONFIG2_ADDR, WCT_CHOP_VAR | INT_TEST_OFF | TEST_AMP1 | TEST_FREQ3);

    ADS_Write_register(ADS1298_CH1SET_ADDR, PWR_UP | PGA_6 | CH_IN_NORMAL); // Normal mode
    ADS_Write_register(ADS1298_CH2SET_ADDR, PWR_UP | PGA_6 | CH_IN_NORMAL); //Normal mode
    ADS_Write_register(ADS1298_CH3SET_ADDR, PWR_DWN | PGA_6 | CH_IN_SHORTED);
    ADS_Write_register(ADS1298_CH4SET_ADDR, PWR_DWN | PGA_6 | CH_IN_SHORTED);
    ADS_Write_register(ADS1298_CH5SET_ADDR, PWR_DWN | PGA_6 | CH_IN_SHORTED);
    ADS_Write_register(ADS1298_CH6SET_ADDR, PWR_DWN | PGA_6 | CH_IN_SHORTED);
    ADS_Write_register(ADS1298_CH8SET_ADDR, PWR_DWN | PGA_6 | CH_IN_SHORTED);

    ADS_Write_register(ADS1298_RLD_SENSP_ADDR, RLD1P_ON | RLD2P_OFF | RLD3P_OFF | RLD4P_OFF | RLD5P_OFF | RLD6P_OFF | RLD7P_OFF | RLD8P_OFF);
    ADS_Write_register(ADS1298_RLD_SENSN_ADDR, RLD1N_ON | RLD2N_ON | RLD3N_OFF | RLD4N_OFF | RLD5N_OFF | RLD6N_OFF | RLD7N_OFF | RLD8N_OFF);

    ADS_Write_register(ADS1298_WCT1_ADDR,WCTA_ON|WCTA_CH1_POS|aVF_CH6_OFF|aVL_CH5_OFF|aVR_CH7_OFF|aVR_CH4_OFF);
    ADS_Write_register(ADS1298_WCT2_ADDR,WCTB_ON|WCTB_CH1_NEG|WCTC_ON|WCTC_CH2_NEG);

    ADS_Write_register(ADS1298_LOFF_ADDR, LOFF_COMP_THRES_1|VLEAD_OFF_PUP |LEAD_OFF_FREQ_4);    // threshold 5% and 95%,detection with  pull up resistors and DC lead off detection on
    ADS_Write_register(ADS1298_CONFIG4_ADDR, LOFF_COMP_ON | WCT_TO_RLD_OFF);   //Lead off comparator on, wilson is not to RL

    ADS_Write_register(ADS1298_LOFF_SENSP_ADDR, LOFF8P_OFF | LOFF7P_OFF | LOFF6P_OFF | LOFF5P_OFF | LOFF4P_OFF | LOFF3P_OFF | LOFF2P_OFF | LOFF1P_ON);
    ADS_Write_register(ADS1298_LOFF_SENSN_ADDR, LOFF8N_OFF | LOFF7N_OFF | LOFF6N_OFF | LOFF5N_OFF | LOFF4N_OFF | LOFF3N_OFF | LOFF2N_ON | LOFF1N_ON);

    ADS_Write_register(ADS1298_PACE_ADDR, PACE_CH2 | PACE_DETECT_BUFF_ON );


With all electrodes connected status word is allways  0xC00400, then wi interpret AiN7 is open, but we have not enabled the leadoff detection for AiN7. In the table (table.png) is explicitated the different test we made. In the first column is the lead disconected and in the other columns 1 is lead off detected and 0 does not detected. In the case of LL if we configure the threshold to 30% and 70% we detect the lead off, but we have only the 40% of dinamic range of input.

In order to verify, we measure the DC voltage at input and is 1.5V, when we disconnect the lead this input goes to ADD or 0V, and the leadoff detection is the same as in the previous table.

In order to verify we left the not used input floating (we disconet it from AVDD), like we read in TI forum (about misfuctioning internal test signals with not used pin tilt to AVDD) and the result is the same we descript in the .

We replace the ADS1298 for another from stock and we have the same result.

Do you have any idea or detect some problem with this tests/configuration? Do you recomend an aditional test?

Thanks in advanced