• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 45 subscribers
  • Views 233 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS1210: ADS1210U - About input impedance between AINP and AINN

Hide
Guru 21045 points

Part Number: ADS1210

Hi Team,

 

Our customer have been using ADS1210U for a long time.

However, They are in trouble because of the large variation between lots of " input impedance between AINP and AINN ".

LOT1:Around 600kΩ

LOT2:Around 700kΩ

 

[ADS1210U conditions]

XIN 8.000MHz±1ppm

GAIN 2

TURBO 8

Decimation Ratio 624

(Data Rate 200Hz)

 

By the way, they calculate using “AIN Impedance (Ω) = (10MHz/fXIN)•4.3E6/(G•TMR)” of datasheet page17.

The result is close to the measured value.

 

[For example]

AIN Impedance is 335.9375kΩ.

They would like to know “input impedance between AINP and AINN” so 335.9375kΩ *2 =671．875kΩ.

 

I have four two questions.

 

-------

[Q1]

There are two formulas in the datasheet.

Which constant is correct(4 or 4.3)?

-Page2

-Page17

-------

 

[Q2]

Could you please let us know design value?

(For example, Form 500kΩ to 800kΩ)

So, they would like to know if the following values ​​are normal.

LOT1:Around 600kΩ

LOT2:Around 700kΩ

-------

 

Regards,

Hide

  • +1
    TI__Guru** 113765 points

    Hello Hide,

    The ADS1210 is a 25+ year old device.  Unfortunately I no longer have access to validation material showing the variation of input impedance.  Even if I could still access this data, the original design is from a fabrication process that no longer exists so I'm not sure how specific I can answer the questions.  In final test the impedance is not checked, only performance.  This means that the impedance can vary and there are no specific limits with respect to minimum or maximum values.

    As some background, note that term 'impedance' implies frequency.  As the input is a switched capacitor, there are charge/discharge cycles that are moving charge from the input source to the input sampling capacitor.  The rate of sampling is based on the master clock rate for the device, the turbo mode setting and the gain setting for the PGA.  The end result is the faster the input sampling the lower the impedance.

    The input circuit is shown in a simplified block on page 17 of the ADS1210 datasheet in Figure 11:

    The movement of charge becomes dynamic relative to the charge time required to charge the internal sampling cap.  The amount of charge required to charge the cap will depend on the input voltage and the reset of the Cint cap based on the Vcm level.  This produces an input bias current that is also dynamic.

    Hide said:

    [Q1]

    There are two formulas in the datasheet.

    Which constant is correct(4 or 4.3)?

    The typical response as shown in the electrical characteristics table is rounded to an integer value of 4.  The more accurate relationship is to use the value of 4.3 as given in the formula on page 13 as well as page 17.

    Hide said:

    [Q2]

    Could you please let us know design value?

    As I stated earlier in the post, I do not have this information.  Also, as the design was ported to a different fabrication process I'm not sure the original specification would be totally valid.  Also the impedance could potentially change over temperature.  In general a good guideline for older processes is to expect that values can change by 20%.

    Best regards,

    Bob B

      

  • 0 in reply to Bob Benjamin
    Guru 21045 points

    Hi Bob-san,

    Thank you for the detail information.

    I greatly appreciate your cooperation.

    Regards,

    Hide